POP11 is a PDP11 compatible processor fit into an FPGA. Design language is SFL and we converted SFL to Verilog with sfl2vl.
We have two version of POP11.

• POP11/40

  This processor is PDP11/40 compatible with MMU and EIS as well as serial I/O, IDE hard drive interface and timer. It can boot UNIX from IDE HDD. It uses about 3000 logic cells with Altera FPGA. We are currently use Cyclone EP1C3 or FLEX EP1K100 in our lab.
  See AUN SeedNet Poster or Pictures
  

  SFL source code of POP11/40 is available.

  POP11/40 Source Package download (V1.1)

  See COPYING to use of this package.

• POP11/10

  This processor is PDP11/40 compatible without MMU/EIS. It can fit within Altera's EPF10K30E. Configuration file for CQ publishers FLEX evaluation kit is provided on CDROM of Design Wave magazine, No.7, July. 2003.

• Supporting softwares for POP11
  1. binutils-2.13 patch
  2. Gcc3.2 patch(update)
  3. Newlib-1.10 patch I exclude 'setjump' function to save time of porting.
  4. A real-time OS 'proc' for PDP11

Contact:

HomePage of Dept.