;********************************************************
;														*
;	#�@M16C START UP KIT MONITER S/W	 Ver1.00		*
;														*
;	FILENAME: mon30dbg.h								*
;	VER		: 1.00.00									*
;	CPU		: M16C										*
;	FUNCTION: Header file of M16C start_up kit moniter	*
;	SPEC	:											*
;	OPTION	: "PDB" 0 : for KDB30						*
;					1 : for PDB30						*
;			  "DBG" 0 : for Normal use					*
;					1 : for DEBUG of moniter			*
;														*
;	CRAETE	: 1999.3.1									*
;														*
; 	Copyright(c) 1995-1999 MITSUBISHI ELECTRIC Co. 		*
; 	and MITSUBISHI ELECTRIC SEMICONDUCTOR SYSTEM Co.	*
;	All Rights Reserved.								*
;														*
;********************************************************
dbg_nmicnt:		.BLKW		1			; NMI counter
dbg_rcvcnt:		.BLKW		1			; NMI receice counter
dbg_moncnt:		.BLKW		1			; NMI moniter program counter
dbg_spccnt:		.BLKW		1			; NMI special area counter
dbg_usrcnt:		.BLKW		1			; NMI user counter
dbg_cmd4cnt:	.BLKW		1			; NMI CMD4 counter
dbg_rplycnt:	.BLKW		1			; NMI reply counter
dbg_rcvmax:		.BLKW		1			; RCV DATA MAX
	.ORG		Vdbg_s + 10H
dbg_trsbusy:	.BLKW		1			; S_TRS BUSY counter
dbg_trsrdy:		.BLKW		1			; S_TRS RDY counter
	.ORG		Vdbg_s + 20H
dbg_pcl:		.BLKB		1			; USR return PC(L)
dbg_pcm:		.BLKB		1			; USR return PC(M)
dbg_flgl:		.BLKB		1			; USR return flag (L)
dbg_flgpch:		.BLKB		1			; USR return flag (H)PC(H)
	.ORG		Vdbg_s + 30H
dbg_stepall:	.BLKW		1			; STEP interrupt ALL  counter
dbg_stepusr:	.BLKW		1			; STEP interrupt from user counter
dbg_stepetc:	.BLKW		1			; STEP interrupt from etc
dbg_allrdy:		.BLKW		1			; STEP process ALL counter
dbg_reitrdy:	.BLKW		1			; STEP process reit ready counter
dbg_reitend:	.BLKW		1			; STEP process reit end counter
	.ORG		Vdbg_s + 40H
dbg_undusr:		.BLKW		1			; UNDEF interrupt USR  counter
dbg_undetc:		.BLKW		1			; UNDEF interrupt ETC  counter
	.ORG		Vdbg_s + 50H
dbg_flg:		.BLKW		1			; Flag information
	.ORG		Vdbg_s + 60H
; ----- for embeded -----
int_brk_cnt:	.blkw	1		; INT_BRK Counter
int_dma0_cnt:	.blkw	1		; INT_DMA0 Counter
int_dma1_cnt:	.blkw	1		; INT_DMA1 Counter
int_key_cnt:	.blkw	1		; INT_KEY Counter
int_ad_cnt:		.blkw	1		; INT_AD Counter
int_u0snd_cnt:	.blkw	1		; INT_UART0_SND Counter
int_u1snd_cnt:	.blkw	1		; INT_UART1_SND Counter
int_u0rcv_cnt:	.blkw	1		; INT_UART0_RCV Counter
int_u1rcv_cnt:	.blkw	1		; INT_UART1_RCV Counter
int_ta0_cnt:	.blkw	1		; INT_TA0 Counter
int_ta1_cnt:	.blkw	1		; INT_TA1 Counter
int_ta2_cnt:	.blkw	1		; INT_TA2 Counter
int_ta3_cnt:	.blkw	1		; INT_TA3 Counter
int_ta4_cnt:	.blkw	1		; INT_TA4 Counter
int_tb0_cnt:	.blkw	1		; INT_TB0 Counter
int_tb1_cnt:	.blkw	1		; INT_TB1 Counter
int_tb2_cnt:	.blkw	1		; INT_TB2 Counter
int_int0_cnt:	.blkw	1		; INT_INT0 Counter
int_int1_cnt:	.blkw	1		; INT_INT1 Counter
int_int2_cnt:	.blkw	1		; INT_INT2 Counter
int_wdt_cnt:	.blkw	1		; INT_WDT Counter
; ----- -----
	.ORG	1000H
dbg_rcvbuf:		.BLKB		2048		; Receive data save area
	.ORG	1800H
dbg_sndbuf:		.BLKB		2048		; Send data save area
	.ORG	2000H
dbg_tstdat:		.BLKB		16			; Test data area
;
;********************************************************
;														*
;	FILENAME: mon30dbg.h								*
;														*
; 	Copyright(c) 1995-1999 MITSUBISHI ELECTRIC Co. 		*
; 	and MITSUBISHI ELECTRIC SEMICONDUCTOR SYSTEM Co.	*
;	All Rights Reserved.								*
;														*
;********************************************************