IMD 1.17: 23/10/2016 22:22:31 File generated by the HxC Floppy Emulator software v2.8.9.4  X- ؋FFFv3Pvv^FFFF= rߌȎ.program_version_number=V4.0program_name=iAPX 86, 88 Bootstrap Loader(C) INTEL CORP 1980, 1981, 1982XP.vǹ4^&W&g&_&/RMX86SYSTEMUFMs1PP^&7Y:u.^GFF ^GFFM뺀>Ms ^&?t F]UDiag2cZiRMX 86F02 (VOL1 N 2 05 1 >uP,.,&NO,.H ]U88]U4&F4F~t^F44&F4 t~t:N4&w>0Y4&04@4N뜉]UF  FFF t&t t u FN^&?/u G:< :<6Q1PP P1 t0߹FY&G&G>&G 1&w&wQ6>P@1@;w߉&8t[:P@PsE:<@&>:&?/uG :&?uF:<m@tzh6>TH"B>BuBpO >OuBl>OpuG> v^G$PQ>Pus$m"ր>P@u^(X&P*빀>Ou@t :$4"B>Ou+ 20> v0&G02>Ouc20I46> v4&G464DFI464D^;u;s> tCQ>Ht"PF Pk]UQQz xus>btfu FFF F^66V6TFP PTVTVfubZ\^6^6\6\^66^6\FP P\^\^9duf`@`6Z抌;uMZ@Z`Ƌ\^6^6\6e\^Z;ubd;u XddRƋ;Xu=R@RXbƋTV6V6T6T%VW mW mW R**`T%uW yW yW  %W W W X--Z %W W W 46 %W 3X W @%]UFf‹]UF3vFv،]UFVv]0123456789ABCDEF U6P6L]UQFF<w:sFF]UF tr+9Fv6FPvR68vNFYF.; Z A ]%X #X #X *,%3X VX VX tK&&L%[X /Y qX @%^X X X %eX X X P%kX /Y /Y 8%?W /Y [X 00%AW W OW @@%EW WW WW P%IW vW vW %LW W W %OW OW OW V9zu9xwxxz+ףxz]U~u666fP PUAPv6FVR&PrFV9Vu9FvN~+N~Rvv&PgXRƋTV6V6T6TV6X6TVTV6X&PN~+N~9Vu9Fv!PNV+׉NVP+FVs6Pv0fVFRTV6V6T6TVXb`d]UFf؋ʋFf‹W W W  %W W W P%W 3X 3X p%W W W %W W W !0"%W W W <` 3W 3W 3W PF$$H3W 3W 3W P+3W 3W 3W ,3W 3W 3W 3W 3W 3W P-%3W /Y ?W .%qX qX qX %|X X X TII%X X X @%X X X _`%Y Y Y Q)HXR'/Y {Y {Y vMLHR?SPACEMAPR?FNODEMAPR?BADBLOCKMAPSDTDIR.286SDT351.DIRSDT534.DIRSDT544.DIR!mline.lnk"tests.lnkSRC CSD OBJ LST\@@%ݘ@hev@E@ TESTDEFBLOCKUSERTDTUSERNUMBEROFTESTSTDSTARTPQFIRST_TIMEINITPQNUMBER_OF_BOARDSINIT PQBOARDINITPQBOARD_IN_TESTINITPQSYSTEM_CLOFINITPQSYSTEM_TIMERINITPQSYSTEM_TIMER_INTRINITPQSYSTEM_BASE_PORTINIT INPUT_LINEPRINT_BIN_BYTE PRINT_BIN_NIBPRINT_BIN_WORD PRINT_CHARPRINT_DEC_BYTE PRINT_DEC_NIBPRINT_DEC_WORDPRINT_HEX_BYTE PRINT_HEX_NIBPRINT_HEX_WORD PRINT_STRINGTDDEBUG LINEBUFFERTDV] USERCITE)SQPROMPT_NUMBER SQRESET_BOARD{ SQSEND_MSGq SQTIMER_START\ SQYES_OR_NO#0+SQINTR SQINTR_SET9 SQINTR_UNSETN MENU_DRIVER7 PRINT_NUMBERmGET_NUMDѐ# LQ_DWORD_DIV LQ_DWORD_MULPD-USERRESETHARDWARE USERRESETSOFTWARE:  VERSION1P0ASM86.86 V2.0w&COPYRIGHT 1983 INTEL CORPORATION>MAINQPLM86 V2.14/23/84 17:13:14UD VVVߠP]4*Copyright 1982,1983 Intel Corporation"&Software Pr VERSION1P0)CODE??SEGCGROUPSTACKMEMORYDATA MAIN_CODE MAIN_DATA ??INITCODE PUBLICS_CODE PUBLICS_DATA SDT_INIT_CODE SDT_INIT_DATA TIMER_CODE TIMER_DATA UTIL_CODE UTIL_DATA GINTH_CODE GINTH_DATA MENU_CODE MENU_DATA PNUM_CODE PNUM_DATAGETNUMBER_CODEGETNUMBER_DATALQ_PLM86_LIB_CODE RESET_CODE RESET_DATAhH"@6@ ToDH @6 ݘ@ q@ C@ @_@@E@@M@@ |@@OPYRIGHTUSERSPN& PQBASE_ADDRPQBOARD PQBOARD_IN_TEST}PQFIRMWARE_VERSION PQFIRST_TIME PQINT_ON_PICPQNUMBER_OF_BOARDSPQPARAMPQPORT_IN_TESTPQSYSTEM_BASE_PORT PQSYSTEM_CLOF~PQSYSTEM_TIMERPQSYSTEM_TIMER_INTRPQWAIT_FOR_TIMEOUT5 INITIALIZESDTac SQCLEARTIMEOUT SQREADTIMERx SQRESETTIMERf SQSETTIMEOUTW SQSTARTTIMER8 SQSTOPTIMER  MY_LOADER SQCHIP_INIT) SQCR_ONLY~ SQGET_NUMBERSQINCREMENT_PTRg SQPORT_READ) SQPORT_WRogram # 173243.020{R.L&H;rj P.D^&.H& &AS.D&HZ[&IX&AS.D&@[&A^&q&A &A uF; a YXY(Y2X=XMXeXąY̊V/..'P PPPRz PUBLICS^PLM86 V2.14/23/84 17:13:52Ӡ4 ]/#Copyright1983 Intel Corporation۠((C) Intel Corp 1982 SDT_INITPLM86 V2.14/23/84 17:14:08ѠD FPF.'^&H.C&HFPF.'^&H.C&HFPF.'^&H.C&HFPF.'^&H.C&HFPF4v XXXX&XhXuXġXĭXXXXXuF.m&0~@uF.m&0k~!uF.m&0O~%u6.mF&VFʴ&ЉVFR F~.yU P]ˌ X V.yUFF.uv&$u+JV9Vv>FN;v:fFF@F.u&$u+JV‹F FF]ǜXV X(X_XiXd#.yUFsLWPF.uv&8 uyr& F.uv&$5u+JVsFF~sFFF]Z'XXXV(V /XMXXXᠨ.yU[P^ .#-7v are all reconfigurable to * meet specific installation environments (unless * otherwise noted). Default values for the J5 * and J6 iSBX connectors of the iSBC 286/10 cpu * board have been provided. * * LANGUAGE DEPENDENCIES: * * PLM/86 [sdt351cnf.p86] * ***>GINTHPLM86 V2.14/23/84 17:16:10֠+  }   57]'#Copyright1983 Intel CorporationӠ9.7UQFu< vȴ.awEJR # ( - û % û û  û&&OF :r)< w%.'&FN "؈^FF<r$<w .'&FNɳ"؈^]X&X(X*X,X.X0X2X4Xter language, in any form or by any * * means, electronic, mechanical, magnetic, optical, chemical, manual or * * otherwise, without the prior written permission of Intel Corporation, * * 3065 Bowers Avenue, Santa Clara, California, 95051, Attention: Software * * License Administration. * * * \***************************************************************** of the test */ name$ptr POINTER /* Address of test description */ ) PUBLIC DATA ( REC, @sq$pit_init$br, @sq$pit_init$desc, REC, @sq$u_init$br, @sq$u_init$desc, REC, @sq$u_intrv$br, @sq$u_intrv$desc, REC, @sq$baudrtv$br, @sq$baudrtv$desc, IGN, @sq$u_chtx$br,  LITERALLY '0Dh', lf LITERALLY '0Ah', null LITERALLY '0', true LITERALLY '0FFH', false LITERALLY '0', pass LITERALLY '0FFH', fail LITERALLY '0', /***** GPCP oriented literals *****/ /***** SDTMON oriented literals *****/ hexform LITERALLY '0C3h'; DECLARE IGN LITERALLY '1', REC  TEST - 351 - Version 3.0',cr,lf, 'Copyright 1983 Intel Corporation',cr,lf,null); DECLARE sq$pit_init$desc (*)BYTE DATA( ' 351 PIT INITIALIZATION ',null), sq$u_init$desc (*)BYTE DATA( ' 351 USART INITIALIZATION ',null), sq$u_intrv$desc (*)BYTE DATA( ' 351 USART INTERRUPTS ',null), sq$baudrtv$desc (*)BYTE DATA( ' 351 BAUD RATE VERIFICATION ',null), sq$u_chtx$desc (*)BYTE DATA( ' 351 CHARACTER TRANSMITTER ',null), sq$u_chrx$desc (*)BYy procedure external and $br description * 5) link new test modules to sdt-351 * ***************************************************************/ DECLARE num$ts LITERALLY ' 6', /* Total number of optional */ /* and mandatory tests */ test$def$block (num$ts)STRUCTURE ( flag BYTE, /* RECoginze / IGNore test */ addr POINTER, /* Address************/ Configuration: DO; $subtitle('Data Declaration Section') /*************************************************************** * * * Data Declarations Section * * * ***************************************************************/ /***** Generic literals *****/ DECLARE boolean LITERALLY 'BYTE', cr  @sq$u_chtx$desc, IGN, @sq$u_chrx$br, @sq$u_chrx$desc ); $EJECT /*************************************************************** * * * Sign-on Message and Subtest Titles * * * ***************************************************************/ DECLARE user$signon (*)BYTE PUBLIC DATA( 'SYSTEM DIAGNOSTIC LITERALLY '0'; DECLARE error boolean EXTERNAL; $subtitle ('SDT-351 Test Definition Configuration Section') /*************************************************************** * * SDT-351 Test Definition Configuration Section * * Additional user-supplied tests may be entered here. * 1) increment num$ts * 2) fill in test$def$block DATA * 3) supply test description message * 4) supplTE DATA( ' 351 CHARACTER RECEIVER ',null); /*************************************************************** * * * Mandatory Subroutines * * * ***************************************************************/ Initialize$GPCP$flags: /* Initialize GPCP variables */ PROCEDURE EXTERNAL;  /* CHARACTER RECEIVER TEST */ PROCEDURE EXTERNAL; END sq$u_chrx; sq$u_chrx$br: PROCEDURE boolean PUBLIC; CALL Initialize$GPCP$flags; CALL sq$u_chrx; RETURN NOT error; END sq$u_chrx$br; $subtitle ('Installation-Specific Configurable Defaults') /*************************************************************** * * Board-Specific Configuration Information * * Defaulinit; sq$pit_init$br: PROCEDURE boolean PUBLIC; CALL Initialize$GPCP$flags; CALL sq$pit_init; RETURN NOT error; END sq$pit_init$br; sq$u_init: /* USART INITIALIZATION TEST */ PROCEDURE EXTERNAL; END sq$u_init; sq$u_init$br: PROCEDURE boolean PUBLIC; CALL Initialize$GPCP$flags; CALL sq$u_init; RETURN NOT error; END sq$u_init$br; sq$u_intrv: /* USART INTERRUPTS VERIFY TEST */ PROCEDURE EXTERNAL; END sq$n tests? */ isbx_conn_select LITERALLY '0', /* [0..1] J5=0, J6=1 */ /*** *** INITIALIZATION DEFAULTS *** for isbx0 (J5) *** and isbx1 (J6) ***/ /* * timers 0 & 1 cascaded ? */ isbx0$timers_cascaded LITERALLY 'false', isbx1$timers_cascaded LITERALLY 'false', /* * init timer for mode 3, 2 byte count, no timer # specified */ isbx0$u_tim_mode LITERALLY '036h', /* J5 */ isbx1$u_tim_mode LITERALLY '036h', /* J6 */ /* * specify baud r * * Optional Tests * * * ***************************************************************/ sq$u_chtx: /* CHARACTER TRANSMITTER TEST */ PROCEDURE EXTERNAL; END sq$u_chtx; sq$u_chtx$br: PROCEDURE boolean PUBLIC; CALL Initialize$GPCP$flags; CALL sq$u_chtx; RETURN NOT error; END sq$u_chtx$br; sq$u_chrx: /* not normally used in SDTMON */ END Initialize$GPCP$flags; $EJECT /*************************************************************** * * * Mandatory Tests * * * ***************************************************************/ sq$pit_init: /* PIT INITALIZATION TEST */ PROCEDURE EXTERNAL; END sq$pit_ts given here are for a normal iSBC 286/10 * with interrupts not configured. * * Installation-specific variations from these defaults * may be reconfigured here so that the tests will * automatically default to your specific configuration * ***************************************************************/ DECLARE /* * size of scratch area provided for user's future use */ scratch LITERALLY '6000h', /* * which isbx connector to default * to iu_intrv; sq$u_intrv$br: PROCEDURE boolean PUBLIC; CALL Initialize$GPCP$flags; CALL sq$u_intrv; RETURN NOT error; END sq$u_intrv$br; sq$baudrtv: /* BAUD RATE VERIFICATION TEST */ PROCEDURE EXTERNAL; END sq$baudrtv; sq$baudrtv$br: PROCEDURE boolean PUBLIC; CALL Initialize$GPCP$flags; CALL sq$baudrtv; RETURN NOT error; END sq$baudrtv$br; $EJECT /*************************************************************** * ate for each isbx using the index below: * 0= 75 baud * 1= 110 baud * 2= 150 baud * 3= 300 baud * 4= 600 baud * 5= 1200 baud * 6= 2400 baud * 7= 4800 baud * 8= 9600 baud * 9=19200 baud */ isbx0$user_baud_index LITERALLY '8', /* J5 */ isbx1$user_baud_index LITERALLY '8', /* J6 */ /* * specify usart mode using the index below: * 0= async mode, 1.0 stop bits * 1= async mode, 1.5 stop bits * 2= async mode, 2.0 stop bits */ i isbx0$send_intr_tx LITERALLY '0Eh', /* J5 */ isbx0$send_intr_rx LITERALLY '0Dh', /* J5 */ isbx1$send_intr_tx LITERALLY '0Ch', /* J6 */ isbx1$send_intr_rx LITERALLY '0Bh', /* J6 */ /* * LOOPBACK CONNECTORS * required for all receive testing except * for character receiver test (which requires user to inspect * displayed chars visually) */ isbx0$loopback_conn LITERALLY 'FALSE', /* J5 */ isbx1$loopback_conn LITERALLY 'FALSE', /* J6 */ /* * USART ity_index LITERALLY '0', /* J6 */ /* * specify usart command using the index below * 0= tx disabled, rx disabled * 1= tx enabled, rx disabled * 2= tx disabled, rx enabled * 3= tx enabled, rx enabled */ isbx0$command_index LITERALLY '3', /* J5 */ isbx1$command_index LITERALLY '3', /* J6 */ /* * isbx port addresses * included here in case of change in isbx bus * address utilization. * * ******************************************************* * n all tests * values here refer to a timer on the host CPU board */ Sys_clk_freq LITERALLY '1', /* Onboard timer frequency: */ /* 0 = 153.6 KHz */ /* 1 = 1.23 MHz */ /* 2 = 2.46 MHz */ Sys_timer LITERALLY '0', /* Onboard timer to be used */ /* for the fail/safe timer */ Sys_timer_intr LITERALLY '0', /* Interrupt connected to */ /* timer specified in */ /* cpu_timer sbx0$ceb_tim1_data LITERALLY '0B2h', /* J5 */ isbx0$ceb_tim2_data LITERALLY '0B4h', /* J5 */ isbx0$ceb_PIT_cntr LITERALLY '0B6h', /* J5 */ isbx1$ceb_tim0_data LITERALLY '090h', /* J6 */ isbx1$ceb_tim1_data LITERALLY '092h', /* J6 */ isbx1$ceb_tim2_data LITERALLY '094h', /* J6 */ isbx1$ceb_PIT_cntr LITERALLY '096h', /* J6 */ /* * CPU INTERRUPTS * send interrupt levels as referred to by the CPU PIC * (a value > 07 means that the interrupt is not connected) */ sbx0$user_mode_index LITERALLY '0', /* J5 */ isbx1$user_mode_index LITERALLY '0', /* J6 */ /* * specify character length using the index below * 0= 5 bits * 1= 6 bits * 2= 7 bits * 3= 8 bits */ isbx0$char_length_index LITERALLY '3', /* J5 */ isbx1$char_length_index LITERALLY '3', /* J6 */ /* * specify parity using the index below * 0= parity disabled * 1= parity odd * 2= parity even */ isbx0$parity_index LITERALLY '0', /* J5 */ isbx1$parTIMER CLOCK FREQUENCY SELECT * 0=153.6 KHz * 1=1.23 MHz * 2=2.46 MHz * (factory jumpered to 1.23 MHz) */ isbx0$clock_freq LITERALLY '01h', /* J5 */ isbx1$clock_freq LITERALLY '01h', /* J6 */ /* * USART BAUD RATE TIMER SELECT * timers 0..2 on PIT are available via jumpers, * timer #2 is factory wired default */ isbx0$baud_timer LITERALLY '02h', /* J5 */ isbx1$baud_timer LITERALLY '02h', /* J6 */ /* * FAIL / SAFE CPU TIMER * used i *!*!* NOTE, the addressing in the isbx-351 *!*!* * *!*!* manual is not correct for any 16 bit *!*!* * *!*!* cpu board (port stepping = 2, <> 1) *!*!* * ******************************************************* */ isbx0$ceb_USART_data LITERALLY '0A0h', /* J5 */ isbx1$ceb_USART_data LITERALLY '080H' , /* J6 */ isbx0$ceb_USART_cntr LITERALLY '0A2h', /* J5 */ isbx1$ceb_USART_cntr LITERALLY '082h', /* J6 */ isbx0$ceb_tim0_data LITERALLY '0B0h', /* J5 */ i */ Sys_base_port LITERALLY '0C0h'; /* System processor board */ /* base port */ $subtitle ('NON-CONFIGURABLE DATA AREA') /*********************************************************** * * Non-Configurable Data Area * ***********************************************************/ DECLARE user$tdt (num$ts) pq$sys_timer$init BYTE PUBLIC DATA ( Sys_timer ), pq$sys_timer_intr$init BYTE PUBLIC DATA ( Sys_timer_intr ), pq$sys_base_port$init BYTE PUBLIC DATA ( Sys_base_port ); $subtitle('sdtcnf$pq$control$init ') /***************************************************************** * * TITLE: sdtcnf$pq$control$init * * CALLING SEQUENCE: * * CALL sdtcnf$pq$control$init * * INTERFACE VARIABLES: * pq$control$init * * ABSTRACT: * Thi *** by procedure INITIALIZE_SDT *** most of them are reconfigurable at run-time *** by user$reset$software and user$reset$hardware ***/ pq$port$init (2) STRUCTURE ( USART_data BYTE, USART_cntr BYTE, tim_data (3) BYTE, PIT_cntr BYTE, tx_intr_level BYTE, rx_intr_level BYTE ) PUBLIC DATA ( isbx0$ceb_USART_data, /* J5 DATA */ isbx0$ceb_USART_cntr, isbx0$ceb_tim0_data, isbx0$ceb_tim1rocedure reentrant public; /* * * INITIALIZE PQ$CONTROL$INIT ( J5 ) * */ pq$control$init(0).clock_freq = isbx0$clock_freq; pq$control$init(0).baud_timer = isbx0$baud_timer; pq$control$init(0).u_tim_mode = isbx0$u_tim_mode; pq$control$init(0).baud_count = 0; pq$control$init(0).u_mode = 0; do CASE isbx0$user_mode_index; pq$control$init(0).u_mode = pq$control$init(0).u_mode OR 0100$0010B; pq$control$init(0).u_mode = pq$control$init(0).u_mode OR 1000$0010B; pq$control$init(0) BYTE ) PUBLIC; DECLARE pq$isbx$init BYTE PUBLIC DATA ( isbx_conn_select), pq$timers_cascaded$init (2) BYTE PUBLIC DATA ( isbx0$timers_cascaded, isbx1$timers_cascaded ), pq$user_baud_rate$init (2) BYTE PUBLIC DATA ( isbx0$user_baud_index, isbx1$user_baud_index ), pq$loopback_conn$init (2) BYTE PUBLIC DATA ( isbx0$loopback_conn, isbx1$loopback_conn ), pq$sys_clk_freq$init BYTE PUBLIC DATA ( Sys_clk_freq ),  STRUCTURE ( flag BYTE, overlay BYTE, addr POINTER, name$ptr POINTER, err$cnt WORD, exec$cnt WORD ) PUBLIC, user$number$of$tests WORD PUBLIC DATA(num$ts); DECLARE /* * reserved scratch area for user's use */ user$scratch (scratch) BYTE PUBLIC, user$scratch$size WORD PUBLIC DATA (scratch); DECLARE /*** *** $INIT VARIABLES *** these will be copied up into RAM s configuration procedure is required to support user- * variations to iSBX-351 onboard clock and timer jumpers. * * This procedure is called only by the mainline and only * immediately before calling Initialize$SDT. * * Uses isbx?_user_ literals from above to generate usart mode * bytes. Initializes all fields of pq$control$init for each * iSBX connector on the iSBC 86/30 cpu board. * *****************************************************************/ sdtcnf$pq$control$init: p_data, isbx0$ceb_tim2_data, isbx0$ceb_PIT_cntr, isbx0$send_intr_tx, isbx0$send_intr_rx, isbx1$ceb_USART_data, /* J6 DATA */ isbx1$ceb_USART_cntr, isbx1$ceb_tim0_data, isbx1$ceb_tim1_data, isbx1$ceb_tim2_data, isbx1$ceb_PIT_cntr, isbx1$send_intr_tx, isbx1$send_intr_rx ), pq$control$init (2) STRUCTURE ( clock_freq BYTE, baud_timer BYTE, u_tim_mode BYTE, baud_count WORD, u_mode BYTE, u_comm .u_mode = pq$control$init(0).u_mode OR 1100$0010B; end; do CASE isbx0$char_length_index; pq$control$init(0).u_mode = pq$control$init(0).u_mode OR 0000$0000B; pq$control$init(0).u_mode = pq$control$init(0).u_mode OR 0000$0100B; pq$control$init(0).u_mode = pq$control$init(0).u_mode OR 0000$1000B; pq$control$init(0).u_mode = pq$control$init(0).u_mode OR 0000$1100B; end; do CASE isbx0$parity_index; pq$control$init(0).u_mode = pq$control$init(0).u_mode OR 0000$0000B; pq$control$init(0).n;  INITIALIZE PQ$CONTROL$INIT ( J6 ) * */ pq$control$init(1).clock_freq = isbx1$clock_freq; pq$control$init(1).baud_timer = isbx1$baud_timer; pq$control$init(1).u_tim_mode = isbx1$u_tim_mode; pq$control$init(1).baud_count = 0; pq$control$init(1).u_mode = 0; do CASE isbx1$user_mode_index; pq$control$init(1).u_mode = pq$control$init(1).u_mode OR 0100$0010B; pq$control$init(1).u_mode = pq$control$init(1).u_mode OR 1000$0010B; pq$control$init(1).u_mode = pq$control$init(1).u_mode OR 11000000B; pq$control$init(1).u_mode = pq$control$init(1).u_mode OR 0011$0000B; end; pq$control$init(1).u_comm = 0011$0010B; do CASE isbx1$command_index; pq$control$init(1).u_comm = pq$control$init(1).u_comm OR 0000$0000B; pq$control$init(1).u_comm = pq$control$init(1).u_comm OR 0000$0001B; pq$control$init(1).u_comm = pq$control$init(1).u_comm OR 0000$0100B; pq$control$init(1).u_comm = pq$control$init(1).u_comm OR 0000$0101B; end; end sdtcnf$pq$control$init; END Configuratiou_mode = pq$control$init(0).u_mode OR 0001$0000B; pq$control$init(0).u_mode = pq$control$init(0).u_mode OR 0011$0000B; end; pq$control$init(0).u_comm = 0011$0010B; do CASE isbx0$command_index; pq$control$init(0).u_comm = pq$control$init(0).u_comm OR 0000$0000B; pq$control$init(0).u_comm = pq$control$init(0).u_comm OR 0000$0001B; pq$control$init(0).u_comm = pq$control$init(0).u_comm OR 0000$0100B; pq$control$init(0).u_comm = pq$control$init(0).u_comm OR 0000$0101B; end; /* * *$0010B; end; do CASE isbx1$char_length_index; pq$control$init(1).u_mode = pq$control$init(1).u_mode OR 0000$0000B; pq$control$init(1).u_mode = pq$control$init(1).u_mode OR 0000$0100B; pq$control$init(1).u_mode = pq$control$init(1).u_mode OR 0000$1000B; pq$control$init(1).u_mode = pq$control$init(1).u_mode OR 0000$1100B; end; do CASE isbx1$parity_index; pq$control$init(1).u_mode = pq$control$init(1).u_mode OR 0000$0000B; pq$control$init(1).u_mode = pq$control$init(1).u_mode OR 0001$  sdt351.csd Copyright1983 Intel Corporation/Yes3NoW6 3/ XX 1  : = @[Yes] or No *N[No] or Yes *ݠ\ _ Ѡb Π!e*** Not a Yes or No answer: ? [J] *..b *q3*** ERROR: Invalid input. Please try again ~'*** ERROR: value out of range -- v Please try again ʠ3*** ERROR: Invalid input. Please try again )(*** ERROR: Not a valid selection -- V XVtUX_P^&PȴFY1FFF:Fw3F^F&8w&HtQ FfNF;Fs7^&O^ &8u+JVu^&GFF~t-(PPPFP^S)PFFFPyFt"F^ &0~N^&GN:v*FzȰ ^&GBFPFbPF]ڜ+X V̷VĿXVPV[X`VQjUF.v&8 u sFF=s.& t tu ^&6X8X:Xt &G.'& .6#&.&x r ]_^[ZYXz=XXY#Y*Y7XEXLYSY]XhXvXMENUAPLM86 V2.14/23/84 17:16:32ҠV##M, Please try again Q)e*** ERROR: Not a valid selection -- ۠, Please try again V.U FFr1:P^SFtue^&7GP6PFP!PP^ SFP PPFPFP^GPvv^&7^ S^Sl@F%u@=P^ &s@NP^ S^S`F% uX\PF#;uv^SFPQv^S^ SFPv^S^S^ SFPF]|HXX V*VJXZX|DįX̴VXXV FF.&YtyuGFF@F=s7.&Eteu#F@F=s.&StsuF.v&X)X.V6XEJXlXqVyẌčX̒Vc(` UQFF;Fr PFu]ӜVO SDT351 & PRINT(sdt351.dir/lst/sdt351.mp2) RESERVE(00h to 0100FH) ; ;--------------------------------------------------; ; ; sdt351.csd completed ; ; ; The reconfigured sdt351 can now be invoked by ; ; ; booting /sdtdir/sdt351 ; ; ;--------------------------------------------------; ;-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=- ;-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=- ; ;--------------------------------------------------; ; ; SDT 351. CSD ; ; ; [ creates the reconfigured SDT 351 ] ; ; ;--------------------------------------------------; ; ; compile the user configuration module PLM86 sdt351.dir/src/sdt351cnf.p86 LARGE & PRINT (sdt351.dir/lst/sdt351cnf.lst) & OBJECT(sdt351.dir/obj/sdt351cnf.obj) GFF^G8F $<u^GFF^GF $<u^GFF^GFFF $P^S^S^SPF $P^S^S^S] X̖ěX̠V̺U^&F$<uFF$<uF F$<u FFVF$FF":u ^&FF Pvv^SFP~uOF$<u^&^ &4F$<u^&^ &F$<u^&&W^ &&W~tPFF":tF$<u^F&8Gwa&8Gr[F^ &fF$<u^F&9Gw;&9Gr5F^ &@ sdt351.dir/obj/tests.lnk, & ** and THE TESTS THEMSELVES ** monitor/sdtlrg.lib & ** and the monitor library ** & TO sdt351.dir/obj/sdt351.lnk & PRINT(sdt351.dir/lst/sdt351.mp1) INITCODE ; ;--------------------------------------------------; ; ; Locate the linked files ; ; ;--------------------------------------------------; LOC86 sdt351.dir/obj/sdt351.lnk & TPNUM6PLM86 V2.14/23/84 17:17:11Ԡ.  YQTH0123456789ABCDEF.U,^&^&u+JVu^&^&?u^&Gt< v^&^&?uA~u ^ & ~u ^ &~u^ &&WFV^&^&?t^&uF0F F~ֹF0FFFV tP^&F~ljF.GNյB^&F~FVN린 ^&*GF&uFմz uFFմBP^&Gs ^.w]Ɯ-X xFFF FFF~wF+Fu+JV:VsIF=s.>&8 uFF=s..>&;u+Ju ^&FFœXX#V 6XPXYXĿXXXXX2X4X6X8X:XX@XBXDXFXHXJXtXšXŻXXG3FF.>&$+u+JVF8FsV#B#Copyright1983 Intel Corporation͠YQTHyqth ؠ+0123456789ABCDEFi; D.BU FFF.>>F=s.>&8 uFFF.>&F;u+JVt ^&[F<0r<9vF&( .>F&:NvNFF.>&F.>F& u+JVƈFu^.^&58Nu.~u~w^&v~ ^&]  XXBPnLQ_DWORD_DIVIDEЈ1SERIES-III 8086/8087/8088 MACRO ASSEMBLER V1.1L u;v 33ˋ33U3 ҃+@sH]LQ_DWORD_MULTIPLY1SERIES-III 8086/8087/8088 MACRO ASSEMBLER V1.1P؋RESETPLM86 V2.14/23/84 17:15:25Ѡ$ 3   }   VV8 ]#Copyri <YvDXX XXXXXX"X&X*X.X2X26 I_~<œ8XX XXXXXX"X&X*X*dI_~.XX XXXXXX"XP"I_~˜$XX XXXXXd6gXXX X(Enter board 1 send interrupt level (Enter board 2 send interrupt level ( XXXXXX"X&X*X.X2Xn,X` %Kɠ  @ "'Set global V variables to default )%* iRMX86/XENIX Firmware version K ڠN *** WARNING: This test suite may not operate correctly *** *** on any version of the iRMX86/XENIX Firmware *** *** prior to version 1.2 *** ͠3 Enter number of iSBC 544 boards in the system p#<*** Illegal number of boards: ([ Legal valumline.lnktests.lnkEnter board 3 send interrupt level (Enter board 4 send interrupt level sJXXX X$Not Connected*2Master PIC level 0 EMaster PIC level 1XMaster PIC level 2kMaster PIC level 3Ϡ~Master PIC level 4Master PIC level 5Master PIC level 6Master PIC level 7Slave PIC level 0ĠSlave PIC level 1Slave PIC level 2: $2EXk~!BXXes are: 1, 2, 3, 4 e3Enter number of iSBC 544 boards in the system ,Enter the number of the board to check *** There is no board z specified in the system 6Legal board numbers are: 1#, ˠ & 0+Enter Dual Port RAM base address for board W ̠Z Enter segment n Enter offset 6 *** Illegal base address: ( Must be on a 1000 Hex boundry ߠ1** WARNING ** With a Dual Port RAM size of -  r board    port  [3] .*** Invalid baud rate: L5 Select from the following baud rate values: C110T, 150T, 300T, 600T, 1200T, 2400T, 4800T, 9600T, 19200T 0b: .8 U .$ &r<PFPvFs.4 &&G&G]10X XX#V,X1V9#JXK .8 UQQ.$ &ЈFFrmP5P. &˷.ĿW)PFP^.  ( - 2 i m  F띰PPP%XX]XdXnŒXŠXũYŮXźXYYXy .( &*P.( & 1P.P.( & 1RKP.( &? w NP.$ &]xAX XVX%V-V4XDVIXNVUX^XcVjX UQFF<weFN.0 &P. &PV‹S.0 &Q X[&Q S.0 &P[&P.0 &L&HFuF.0 &. &S.0 &H_[&HS.0 &H[&HS.0 &H[&HS.0 &H[&H.0 &D&@]3= X+XA and a base address of 3 the system will not be able to access board  G  LEnter board Y send interrupt level pSend interrupt on board נ not connected ..Change loopback connector flags on board h T!Loopback connector on board  serial port  &*Inhibit port usage in tests on board  Inhibit board - port 5 usage 2=Specify baud rate for tests B and C on board ^k mBaud rate fo߰PP.SP. GPPPP}99PP.SP. G#PPPPBtxPvP.SP. G@PPPXP9=P;P.SP. G]PPPPP{P. &ȱ. &@. &. &@., &Z&W؎&G&LXX'X.X>XCXM[X]X_XaXcXeXgXiXkXmXoXqXsXħXĬXijX̽XXXX"X)X3 XSXcX~XĈXĒXĤXĵXXXu UQ P. &PP PFF<r<v!<Pv[P볊F. &. &:s&];X VX!4X9VAVFXKVPXZXbXQU UQQ. &8u FFFFrP. &PPPF<r . &8sPvPP. &?v(F. &:Fr#PvFuܸ&P^F. &]ÿdX)X.V5XESX[X`VhVmXrVwX|Vă5{|e 3FLAGOVERLAYADDRNAMEPTRERRCNTEXECCNTK yp \ w ? trd wmwXN USART_DATA USART_CNTRTIM_DATAPIT_CNTR TX_INTR_LEVEL RX_INTR_LEVEL y@~ wZ ŽD CLOCK_FREQ BAUD_TIMER U_TIM_MODE BAUD_COUNTU_MODEU_COMM y8~wpw`u jO trŽusL truo!I tr" w! tV̲V̺VVXVXX VX!V&X+V3V;VCVHXMVXV]XbVxXrULPFPYPF. &@PPPPFX. &@<vpPFPP]0>X VVXV.X?QX\XaVlVqXvV`-UQFPFPPvFsyF~woPFPPvPFNȋ. &pPFNȋX. &@Fu]pR XVVX#V+#PRINT_DEC_BYTE PRINT_DEC_NIB PRINT_DEC_WORDPRINT_HEX_BYTE PRINT_HEX_NIB PRINT_HEX_WORD PRINT_STRING#TDDEBUG LINEBUFFER$TEST_RXTX_READYRX_READYVALID_TXTX_COUNT RX_COUNT GOTTDV2p COPYRIGHT_MSGUSERSPN! USERCOPYRIGHTPr BAUD_COUNT BAUD_TIMERY CLOCK_FREQXPITU PQCONTROLB PQFIRST_TIMEPQINIT1#PQISBXAPQLOOPBACK_CONNaPQPARAMPQPORTPQSYS_BASE_PORTfPQSYS_CLK_FREQc PQSYS_TIMERdPQSYS_TIMER_INTRePQTIMERS_CASCADED]PQUSER_BAUD_RATE_MAINOSTACKMEMORYCODEDATA MAIN_CODE MAIN_DATA PUBLICS_CODE PUBLICS_DATA SDT_INIT_CODE SDT_INIT_DATA TIMER_CODE TIMER_DATA UTIL_CODE UTIL_DATAGENERIC_INTERRUPT_HANDLER_CODEGENERIC_INTERRUPT_HANDLER_DATA RESET_CODE RESET_DATA@U@ TrD@#@h @G Ø@  @ @ @ %@@ @@=@{|m w wz{ I UFLAGADDRNAMEPTR yH wXĒXĝX̢V̪VĴX̹VX$U FFrUF+PFPWPZPF. &pPPFnPF. &pPPFF#FFt0Pv:PvPFF# +ЉVF. &%F;saPF. &0Pv:PvPFPGPFF. &@F&@]CXV)V.X3V8X=VMX[cXhVxX̆ĥX̪r%!! tr'ю! tr)ˎ t rԎ trڎ tr-ˎ  tr/ t r-Ž w tr TESTDEFBLOCK USERTDTUSERNUMBEROFTESTS TDSTARTSDTCNFPQCONTROLINIT PQPORTINIT PQCONTROLINIT PQISBXINITPQTIMERS_CASCADEDINITPQUSER_BAUD_RATEINITPQLOOPBACK_CONNINITPQSYS_CLK_FREQINITPQSYS_TIMERINITPQSYS_TIMER_INTRINITPQSYS_BASE_PORTINITERROR INPUT_LINEPRINT_BIN_BYTE PRINT_BIN_NIB PRINT_BIN_WORD PRINT_CHAR AXFVQVVX[VcVhXmVĄX̋#ĤXXUQFPFPPvFsyF~woPFP-Pv5PFNȋ. &pPFNȋX. &@Fu]@R XVVX#V+#AXFVQVVX[VcVhXmVĄX̋#ĤXXUF=PFPkPvFrmF~v`FFrJmPFPPvPFN. &@ '1FP PQWAIT_FOR_TIMEOUTgRX_LEVELWTIMRTX_LEVELV USART_CNTRQ USART_DATAPU_COMM\U_MODE[ U_TIM_MODEZ INITIALIZESDTR D SQCLEARTIMEOUT SQSETTIMEOUTu SQSTARTTIMER SQSTOPTIMER\" SQCHIP_INIT_# SQCR_ONLY SQGET_NUMBER+ SQINCREMENT_P*SQINITIALIZEPORTINFOeSQPROMPT_NUMBER. SQRECEIVE=( SQSEND_MSGy#SQSTART_U_TIMERc SQTIMER_START0 SQTRANSMIT& SQYES_OR_NO,TESTLOOKUP_BAUD_COUNT# 1e SQINTR_MASK SQINTR_SET: SQINTR_UNMASK3 SQRX_INTR_ONLYnSQTX_.H&. &.L&.$&]O{X$X-X;XBXUXaXgXnXxXąXčXĕXĜXįXĻXXXXXXXXXTIMERPLM86 V2.14/23/84 16:47:45ˠ <$cde fg : ]. 0`G .Ur,.&.R&. &"Z]ǜ X YX$X3X5< \.U.&.R&. & Z]JX XX(XA .U..C&@ P.?^&H.C&HZ&P P.?^&H.C&HZ&P.C&@ .C&@ @tfV RXYX'Y0Y:YDXOXVYbXkYuYXČXęYģYĭXĺXYXYXYYV PUBLICS^PLM86 V2.14/23/84 16:46:33Ϡ!4]2%COPYRIGHT 1983 INTEL CORPORATION| SDT_INITPLM86 V2.14/23/84 16:46:12ҠT&&Oû&&O&&Oyû &&Od û&&OO û&&O: û&&O% û &&O!6K]rF]LX XX(X7YEXRXbXoX}XXĊXĞXĪXĭXXXXXX(X=XQXSXUXWXYX[X]X_XcYkYoYUTIL8PLM86 V2.14/23/84 16:46:49ȠT VPF.,^&H.&HFPF.,^&H.&HFPF.,^&H.&HFPF.,^&H.&H.<FOX*X5XLXXXĊXėXļXXXXXXX/XFXQXhXtXŌXŘXŰXżXXXX} B&N.&FFt.&.&?vJ.8S.&_[&.&.&.&.&t.0&.&.8S.&_[&.&.&.@&.&.D&.&INTR_ONLY SQTX_RX_INTR(SQRESCHAR_LENGTHSQRESDISPLAY_CONDITIONSSQRESGET_USER_BAUD_RATE3SQRESHAR_DEFAULTS SQRESLOOKUP_BAUD_COUNTX SQRESPARITYSQRESSOF_DEFAULTS USERRESETHARDWARE=USERRESETSOFTWARE> ހMAINQPLM86 V2.14/23/84 16:45:30S? VVV O ]6%Copyright1983 Intel Corporation "!Software Program # 173244.020Q.K&.G&H;s P.?^&.C&&.R&. & Z]=X XX(X7Y5 YQPQRSVW.U;w@.& B.& .&.R&. & Z.&]_^[ZYXc8XYY#Y(Y-X=XJXWXfXvX" WYQPQRSVW.U]_^[ZYX@X3| u.U.&.R&. & Zr$.&.&&.&.&.&.G[ û &&O. &.ûoAB ]_acd e$f(V,V0V4V 8V  .]U P]9 X V .]UQQF.Y&8 t .Y&u+JV~rQ~rDFFF.Y&u+JVFFF](KX /&  & / 8 A J S \ e .&.!&. 1 ]7XXX!X9X@XEXdXhYqYzYăYČYĕYĞYħYİYĹYXXXXXXXXXXXYYYYY Y)Y2Y;YDYKXMXOXQXSXUXWXYX[X]XbXnX|XŀYŋYŒYŖYŝYţYŨXŪXŬXŰYlGENERIC_INTERRUPT_HANDLERƈPLM86 V2.14/23/84%]PF PF F ]iX VX!V,V:VEVPV^ViVtV̂VĉXċXčXďXđXēXĕXėXęX̟V̪XР\ c.]U.&.!&p.&.!&@P.&.!&@P]X)X XX#X1X;XIXQX .]U.&.&.&@.&GF 6.&G.S_.&.&N .&@.&GF .&GF.&G.S_]ʜQX XX!X,X?Xs>^&W^F&F~v FFtFFt] XXXh .]UQF~w0^ &Wu^ &FFFHF~t XPy]]XTXYXG@ =.]UQ^ &W^&^&u ^ &FF]X>b y.]U.U&r;FFF^&8u ^F&F~>tF.&0FF~@tF.&0FF~!tF.&0FF~%tL.F XX#X+X7XAXIXUX`XhXtXXĈXĔXğXĨXĴXĿXXXXXXXXXX#X/X:XBXNXYXaXmXxXŀXŌXŗXşXūXŶX͠ # .]UF t. &|Py7F t. &PyF t}^. @e+\ SJA8/&@ F tz^.n e\SJA@8YVY%X2Y8Y@XDYQXĊYĐYĕXęYĦX .]UQQFr P &P.Y&8 t+>ys.Y& .Y&u+JV~r FF~rFFF]5SXXV#X(V.Y2V8YAXNYXYaXlYrYzX~YċX .]U[P^.3v sv hF PZv Ov DF P6v +v F P  16:47:19ʠ< NAPQ VWafV V $V!(V",V#0V$4V% 8]* :.8U.S.&_[&r .&. &.&:t. &?r~. &.-û&&OX-û&&OC-&&O1-û &&O- û&&O- û&&O- û&&O- û &&O- û&&O- û&&O- û&&O6.(&.&w@.&"r.&.4&. &?w .& .& .& ]_^[ZYX_QXX!X)X>XMXVXcXlXāXĔXğXħXĵXXX nYQPQRSVW.8U.0&@.0&.&u .&6.&u.$&.&.4&.&?w .& .& .& ]_^[ZYXBXX!X)X ODD EVEN ; BAUD RATE = 75 110 150 300 600 1200 q 2400 f  4800 Y 9600 O 19200 4 RESTORE .8UQQ~w].&F.&F~w>FFNF.&F"F.&FNF.&F"F]nXX/X\XpXđX .8UQQ~w].&F.&F~w>FFNF.&F F.&FȀNF.&F F]XX/X\XpXđX YQPQRSVW.8U.,&@.,&.&w@.(&"r. &.&- û &&Ot- û&&O_- û&&OJ- û&&O5- û &&O #8Mbw. &?r~ X eXX4X=XEXRX`XlXoXĄXęXīXXXXXX)X>XSXhX}XŒXŧXŻXŽXſXXXXXXXXXXXXXXXO &. &.û&&OXû&&OC&&O1û &&O û&&O U.&w@.(&"r0. &.,&@.,&.&6.(&.&u-.$&.0&@.0&.&.4&. &?w .& .& .& ]_^[ZYXI[XX-XSh}]ĜXX+X@XUXjXXĔXĩXľXXXXXXXXXX X XXXXXXXX 3SOFTWARE VARIABLES TO DEFAULTS ? DqOENTER NUMBER OF STOP BITS USING INDEX BELOW : 0= 1 stop bit 1= 1.5 stop bits 2= 2.0 stop bits 3 *** ERROR: *** USE INDEX RANGE [0..2] *** ֠8ECHO CHARS TO PERIPHERAL CONSOLE SCREEN [ v(1) ] ? 8ECHO CHARS TO SYSTEM CONSOLE SCREEN [ v(2) ] ? ]_SENTER CHAR LENGTH AS FOLLOWS: 0= 5 bits 1= 6 bits 2= 7 bits 3= 8 bits F *** ERROR: *** CHAR LENGTH INDEX MUST BE IN RANGE [0..3] *** ENABLE PuXzVŁXňXşXŢXͧVůXʹVżXVXVXVXVfQ P; P.P!P ]kWXVXVX V(X-V4X6X8X:XX@XBXDXFXs .U.&.P&.^&H.&H.&.P&.^&H.&H.S.&_[&.&.&X.&G.&G]CQX XX%X1X:XFXSX_XhXoXĂXĎX̔XěRE VARIABLES TO DEFAULTS ? 2CONTINUE TESTING [ iSBX J! ] ? R& NOW TESTING [ iSBX J! ] : 2>LOOPBACK CONNECTOR INSTALLED ? Ǡ2lALTER INTERRUPTS CONFIGURATION ?  TX INTERRUPT LEVEL  RX INTERRUPT LEVEL 2ALTER TIMER CONFIGURATION ? 2 TIMERS 0 & 1 CASCADED ? G"*** TIMERS 0 & 1 CASCADED: *** BAUD TIMER RESET TO 2 |2e BAUD RATE TIMER JUMPER (0..2) X XXX#X6XBXJXVXcXoXxXĄXđXĝXĦXIJXĿXXXXXXX XX%X.X:XGXSX\XhXuXŁXŊXŖXţXůXŸXſXXXX3 .P&.^&H.&H.&.P&.^&H.&H.&.P&.^&.&]˓8XXX%X1X>XJXSX_XlXwXV> .U.&r%.&G.&G.&].&F.&FPPP.&.&@F~t PK.&.&@ F^.S PP9 F P.S.&_[&. PP|PoPbPUPH$X XVXV!X-XIXNV_XdVlXqVvX{VĂXĎXĪXĭX̲VĺX̿VXVXVXXXXXVXXX"V,X8XTXWX\VdXiVpXrXARITY ?  USE EVEN PARITY ? =ENTER BAUD RATE USING INDEX BELOW: 0= 75 baud 1= 110 baud 2= 150 baud 3= 300 baud 4= 600 baud 5= 1200 baud 6= 2400 baud 7= 4800 baud 8= 9600 baud 9= 19200 baud \D *** ERROR: *** BAUD RATE INDEX MUST BE IN RANGE [0..9] *** IJ-ERROR: CAN NOT LOOK UP BAUD COUNT SYNC MODE NOT SUPPORTED IOsERROR: CAN NOT LOOK UP BAUD COUNT x64 USART MODE NOT SUPPORTED 4 RESTORE HARDWAXĦXߠ .U.&.&.S.&_[&.&.&.&.P&.^&H.&H.&.P&.^&H.&H.&.P&.^&.&.&.P&.^&H.&H.&.P&.^&H.&H.&.P&.^&H.&H.&.P&.^&H.&H.&.P&.^&H.&H.S.&_[&.&.&.& 8 *** ERROR: *** SPECIFY TIMER IN RANGE 0..2 *** Ǡa CLOCK FREQUENCY JUMPER (0..2) 0=156.3K, 1=1.23M, 2=2.46M D$ *** ERROR: *** CLOCK FREQUENCY MUST BE IN RANGE (0..2) *** >=dWARNING: BAUD RATE RESET TO 4800(MAX) WITH SLOW CLOCK Ġ.UQPP.&.&@F~t *P ~t @P VPlP.&.&@ F^.|P/P"PvFFr  ].&.&@.P&X.&@.&.&@.P&X.&@.&.&@FFȈFFFr5OPvPF~rF P.&.&@?.P&X.&@^.v.&.&@@.P&X.&@r.&.&@Ȁ.P&̜XXX*X5XDXOX[X` yh zXĆXĒXĠXİXĹXXXXXvFFr .&].&..&.&FPvFFrJ.&..&.&.&.&P.S.&_[&F>Pv.&.&FlPvFFrP.&.&pP.P&X.&@P.&.&pP.P&X.&@F:&XXX'X, y4 FXMX[XgXlXFFr5SPvPF~rF P.&.&@FF FF.&F.&@]ˋ@XXXCXH yS kXpVzXĆXĤXĵX!.UQ.&.&@FPvF.&.&@FF FF.&F.&@Fr]}.&.&@ FPvF.&.&@߈FF FF.&F.&@]˸hX PFFrjP.&.&0PF~w@r F.&F.& $P.&.&8t@.&.&8wA"r$.&.&Xd. y "X' y.X:X@ GXSX[XbX|XĊXĒX̗VįX̴ yĻXX XXXV+X0 y7XEXN nXXňX͍VŗXťXųXſXXXXX$P.&F.&] y XXp %-5=y~tp^.F\FTFLFDF<F@4F ,F$FFqy.&.&.F1FFFFF .&F.&@]MXXX0X7XVX]Xb yuX|X́ yěXXXXXXXXXXXXiXkXmXoXqXsXuXwXyX{XŀXŌXŚXXXXXX =.U .&F.&FPX#X( y3 KXPVZXfXtXńXŔXřXťXųXXXXX-X.&@<.&.&@.P&X.&@ @.&.&X.&GFPv.&G.&GFPv.&GF.&]˰ XX"X0X@XIXKXMXPXUXZXaXmXsXzXĄX̉ y̑ ĚXģXĭX̲ y̺ XXk.UQQ.&.&@ FFFxXāXăXĊX̏ y̗ ĮXĺXĿXXXXXXX yXXX y 'X3X=XB yJ aXf ymX{Xͅ ŌXŜXţXͨ yůXŽX XX :X}-PvFFrP.&.&0.&.&.S.&_[&r%.&.&@"P|FFrleP.&.&pPF~w@r!F.&F.&@ XX,X1 y9 CXOXpXāXĞXĪXĽX y XXXXy.UQQ.S.&_[&FFFr5PvPF~ rF PF]T,XXX9X> yI aXfVҠX.UQQF.&.&@F.S.&_[&F~t.&-P~t.&sP~ts^.EF@\F+TF LFDF<F4F,F$FF@PQAP0BAUD_TIMER U_TIM_MODE BAUD_COUNTU_MODEU_COMM y8wp ώ trӎ׎ trÎ _ trŽ trrɎN USART_DATA USART_CNTRTIM_DATAPIT_CNTR TX_INTR_LEVEL RX_INTR_LEVEL y@ d w!M wߎ ӎ tr$ERRORPQPARAMPQISBXTIMPITPQTIMERS_CASCADEDPQWAIT_FOR_TIMEOUT SQSEND_MSG SQCR_ONLY SQTIMER_START SQINITIALIZEPORTINFO SQSTARTTIMER SQCLEARTIMEOUT SQSETTIMEOUTPQINIT1 PQCOINITTPLM86 V2.14/23/84 16:48:48Ǡ {ĜVVV VVVVœ]64 ERROR: TIMER ! DID NOT INITIALIZE, MODE = > 4<ERROR: TIMER ! DID NOT COUNT, MODE = > { l6&7'r@& ufff''l.U.{&F~vvPPFFtF~vhF~vN~t@.&.&"rPPP.&^.r^.Gl^. r0.&.FINITTꖋSTACKMEMORYCODEDATA INITT_CODE INITT_DATA INITU_CODE INITU_DATA UINTRV_CODE UINTRV_DATA BDRTV_CODE BDRTV_DATA CHTXRX_CODE CHTXRX_DATAi@b@T|D@@ @ @ @ @ @@{|m wmwXw`z{ Hunc tr֎ trdus  ? tr Ў{|euf[ trΎ tr܎ wD CLOCK_FREQ NTROL USART_DATA USART_CNTR BAUD_TIMERPQLOOPBACK_CONN SQCHIP_INIT TESTLOOKUP_BAUD_COUNT SQSTOPTIMER TX_LEVELRX_LEVEL CLOCK_FREQPQSYS_BASE_PORT SQINTR_UNMASKPQPORT"U_MODEU_COMM PRINT_CHARTDDEBUGTDV# SQTRANSMIT%SQSTART_U_TIMER W DEC_TO_BIN[ SQPIT_INIT BURNzSQU_INIT* dGOTRX_COUNTRX_READY SENT TEST_RXTEST_TXTX_COUNTTX_READYVALID_TX  SQU_INTRV  RUN_TEST? SQBAUDRTV , SQCHTXRX_INIT SQU_CHRXb SQU_CHTX &F.F&FF~w v[F^.Gl^. r.&~t@~tA r.F&.F&^.u.&P.&r.&^.r^.Gl^. r0.&.FXXV V 7V nXzX̐V ėXĦXXĺXXXX XX$X)XOXcXyXX͆V ͏V͔V śXͫV ŲXXXXXXt&F.F&FF~w v&PFu@.$&"r.&FFuF.&FF:FuF.&t.$& P.$&r.&F򀜥XVFXTX[V dViV ~XčX̜V̡V ĶXXXXVXXXXV 'V,V AXPX_VdV }XŝXųX;VV XVV X#h.&GF.&GF.&.&.&FF.&GF.&GPF.&F.&GF.&EN=! PARITY=!,! USART STATUS=> BAUD=!>> 'TRANSMIT FAILED: USART STATUS=> /RECEIVE FAILED: CHAR SENT=> RECEIVED=> sERROR: UNEXPECTED CHAR RECEIVED WITHOUT LOOPBACK CONNECTOR USART STATUS=> CHAR SENT=> RECEIVED=> __ iNNNJFB^~ s |5 ) !      ,s|5TUAL=> CPU SLAVE PIC MASK: EXPECTED=>, ACTUAL=> #riERROR: BOTH INTERRUPTS DISABLED, CAN NOT TEST TX => RX => SEE RESET HARDWARE TO CORRECT 2RERROR: RECEIVE INTERRUPT DID NOT OCCUR, USART STATUS=> BAUD=!>> S%ERROR: TRANSMIT INTERRUPT DID NOT OCCUR, USART STATUS=> BAUD=!>> !gtERROR: EXTRA RECEIVE INTERRUPT(S): EXPECTED=00>, ACTUAL=>> USART STATUS=> BAUD=!>> )gERROR: EXTRA TRANSMIT INTERRUPT(S): EXPECTED=00>G^.i.&G .S^.(WzFFt]NXXV V .X2Y6YDXIXZXhXvXĀXĊXęX̟VıXĻX̾VXV XXXXX XXX&X6X:Xz.(U^ SFFFЀ~ "r^F&F.&F.$&2PFu@.$&"r.&FFt.&F/F.&FF.&PF.&. S. &_[&r.$[FF;Ft0F.&^.Gl.&G P.{&^.G;Ft'F.&^.Gl.&G<PFFtFFt]EX8XPX]XaXhXmVtXXēXXĤXīX̰V*V[.UQQFF~v+FFF NFFFtF]œX>INITUPLM86 V2.14/23/84 16:49:10Ѡ,-)VVV VVVVV V$V(+]2VPERROR: ASYNC MODE: SB=!.! LGFF8uFFra.&.&GS. S. &_[&r!F.&F.&GPF.& .&FF]>vXXX&X.X?XKXRXWVaXlXxXĜXħXįY̴VĻXXXXXVXXMUINTRVPLM86 V2.14/23/84 16:49:36ɠ85VVV VVVVV V$V(V,V0Vq]0mERROR: CPU MASTER PIC MASK: EXPECTED=>, ACXXX XXXXX X$XUUUUUUUUUU-ZZZZZZZZZZ0000000000,(3XXX XXXXX X$X @@7T*.(U.&F~ vP^.w.> ^Y. &.&8r6.&G.&GH.&G^.iPF^.i^._F.&7FPFP.> .&.&G^.i.&, ACTUAL=>> USART STATUS=> BAUD=!>> we:ERROR: UNEXPECTED CHAR RECEIVED WITH NO LOOPBACK CONNECTOR: CHAR SENT=> RECEIVED=> N[ERROR: RECEIVE FAILED: CHAR EXPECTED=> ACTUAL=> USART STATUS=> BAUD=!>> )RERROR: USART STAYING UNREADY ON TRANSMIT USART STATUS=> BAUD=!>> H;@ERROR: BAD STATUS USART STATUS=> BAUD=!>> wiiiiiiiiiiiiiiiiiiiii)NNN٠ @@6.U.&.&?w@.&?!Y&X.Y3X:X?VFXWXmXvY|XňYŎX͕V ͞VͣV ŪXŸYŽYYYYYV X &.&FF8u  .&  :u@ "r .&.&.&G.&G.&Gr %P r P r @P .&.&G.&.&G.&G.&G.&G r P>wr .& .&.̓VğXİXXYXVXX X'Y9XDXPX^YdXjVqXňXŝXŷYŽXXuA rGF.&F.&GF.&GF.&GP.&]F~v.&.^.TF FF<DL`^.FFFiqy3^.FFF0].&?r7^.HHY^.&^.P&G:PF>wr .& .&.&G.&G.&.&G.&G.&G.&GtPЊ   >wA >wA rFF.& .&~rF@FFFt9.&F.&F]朸X)X3Y7Y>vt" r.XXXV:YEYMYRY]YeYjYpYăXćYċYđX̘V ̡V̦V ĭXXXVV X XYXwA.S.&_[& "r9.&.&.&.&.&GiP].&F.&F.&?rY.&7.&?wFF.&"FF.&"FFFFFFFF.&?.&.&"rY.&7.&?wFF.&"FF.&"FFFF.&F.&FF:Fu@N:NXXV V #X1X?XFXfXoXwXXćXĎX&G.&G.&.&G.&G.&G.&GP.S.&_[ל;V X%Y-Y3X=YAYFYJYSY[YfYlXwX~YăXċYĐXĘYĝXĥYıX̶VļYXVYXVYXYXX XYX"Y'X/Y4X .&.&G^..&G^ΜXX)X5X vz . .&.##1.&7PPj.>} .&.}&G.}S?VXXXXX%X"r.u&=P].&b@{]˃dX YXV "V'V .X=XSXeXnYĀXćX̌VĒYĚXĦYīY̱V̶V ļYCHTXRXPLM86 V2.14/23/84 16:50:28Р8 Zœ5VVV VVVVV V$V(V,V!0V"M  ],. ERROR: T X V$XX#X+X4XYBYGXNYSX[YdXhXpYyX}XńX͉2V9XJXfXqVvV }XęXĨX̷V̼V XXXVX XVXV-X;XKXYXcV#jX{V ŌX͑VśX:tRANSMIT FAILED, USART STATUS=> {> * * READY TO RECEIVE CHARS, SEND CTRL Z TO QUIT * = dERROR: TIMEOUT WAITING FOR FIRST CHAR, USART STATUS=> B TIMED OUT AFTER CHAR(S) RECEIVED, CTRL Z INSERTED i& ERROR: BAD STATUS ON USART = > G L @@oS ABCDEFGHIJKLMNOPQRSTUVWXYZ_!"#$ %*() abcdefghijklmnopqrstuvwxyz0123456789  W ߠw .UL.>b .r&.b&G.v&.b&G.v&.b&G .z&.b&G .bS]ˢGSRCCSDOBJLSTFN. &@ '1VRPFN. &p PFFF<w.;FuFFuFsFPF'1FPF'1VRPPFNF. &@ Ft] XVV X%V-#WX\VgVlXqVyV~X̃VĚX̮VXVXVX"X:X?VRVeVjXoVtXyVŗXPTsdt534cnf.p86~@@ @@;@@@@ @ߘ@@H@@@c @!ޘ@"@#{|m{|ew Pw@/RAM_SIZE BASE_OFFSET BASE_SEGMENTSEND_INT_LEVELRECEIVE_INT_LEVEL INHIBIT_PORT BAUD_RATE LOOP_BACKU_TCASCADED y i wDz{ D wmu j ^ tr us  9 tr tr юuIMER_START# SQPORT_READ SQCHIP_INIT%TDV& PRINT_CHARPQNUMBER_OF_BOARDSPQFIRMWARE_VERSIONG]SQMB_RAM" SQJUMP_OUTQ SQDUAL_PORT_RAMa SQBOARD_IRVŐE CHECK_INPUT_BUFFERS2 !CHECK_OUTPUT_BUFFERSU SQFIRMWARE_VRFYPIT_INIT  SQPIT_INIT[ SQUSART_INITZ SQPIC_INITeSQPPI_AcSQURTIRVʐSQBDRTV SQUCT SQUCRѐSQBSUTIL9t VERSION1P0ASM86.86 V2.0w&COPYRIGHT 1983 INTEL CORPORATION>M VERSION1P0ZCODE??SEGCGROUPSTACKMEMORYDATA MBRAM_CODE MBRAM_DATA JMPOUT_CODE JMPOUT_DATA DPRAM_CODE DPRAM_DATA BRDIRV_CODE BRDIRV_DATA FMWVFY_CODE FMWVFY_DATA INITT_CODE INITT_DATA INITU_CODE INITU_DATA INITP_CODE INITP_DATA PPIA_CODE PPIA_DATA URTIRV_CODE URTIRV_DATA BDRTV_CODE BDRTV_DATAUCT_CODEUCT_DATAUCR_CODEUCR_DATA BSUTIL_CODE BSUTIL_DATA^hH"@A@ T WD@ \@ @k @" @}@@ @,ܘ@r Ǝ t rێ trdW trǎ  trw@0[ trŽÎ trڎ + tr ׎   tr"Ԏ ͎ tr$Ԏ wkERRORPQBOARDPQBOARD_IN_TEST PQBASE_ADDR PQWAIT_FOR_TIMEOUTPQPARAM SQRESET_BOARD SQPORT_WRITE SQSEND_MSGSQINCREMENT_PTR SQCR_ONLYTDDEBUG SQSTARTTIMERSQCLEARTIMEOUT SQSETTIMEOUT MY_LOADER PQINT_ON_PICPQPORT_IN_TEST SQINTR_SET SQINTR_UNSET SQTBRAMPLM86 V2.14/23/84 17:17:56ˠ VVV VVVV ]4#Copyright1983 Intel Corporationr*** ERROR: MULTIBUS RAM access on board !. Location = >>:>>, Value read = >, value expected = > ̠.U.&P.&r PSPs .&.&s<&G &G &W‰F&W &O щVFSP&&G&OF.&.F&9r DATE([]) * ********************************************************************/ /*****************************************************************************\ * * * Copyright Intel Corporation 1982, 1983 * * All rights reserved. No part of this program or publication may be * * reproduced, transmitted, transcribed, stored in a retrieval system, or * * translated v&8ZttSV^F.&.&F&GF&GF&GF&GFv&&O&GZP.&.&rF^v&^v&8ttSV^F.&.&F&GF&GF&GF&GFv&&O&GP.&.&rFFFHF^Ȱ]˖GV 'X/XhXmV tX}X̤V ıXĹXXV XX/V ǀJMPOUTPLM86 V2.14/23/84 17:18:22Ѡ7VVV VVV.O]0#Copyright198**************************************/ config: DO; /* * literals used throughout SDTMON tests */ declare cr literally '0DH', lf literally '0AH', null literally '0', true literally '0FFH', false literally '0', pass literally '0FFH', fail literally '0', boolean literally 'byte', hexform literally '11000011B'; /* format for td$display$number */ /* * External declarations relating to SDTMON */ td$start: procedure external; end td$start; td$set$td$title(' config ') $subtitle(' module of sdt534 V1.0, 17 aug 82, v2.0 21 mar 83') /******************************************************************** * * TITLE: config * * DATE: [] * * ABSTRACT: This module provides the configurable publics * of SDT534. This module is recompiled to adjust to a * different set of default conditions. The values listed * in here are used by user$reset$hardware and user$reset$soft- * ware. * * LANGUAGE DEPENDENCIES: * * PLM86 config.p86PsFPSv FF&GF&G&>&G&G0&G&G&G&Gv&G&&G.& P.&r.&.&ȱ.&HF.&^FHFȰZFFF;FvɜXXYYV%X3Y8X=VHXQX_YhY̙V ğYģYīYXXYV YYYYY#Y,Y5Y@YHYPYYYbYjYtXV̈́V ŋX͕VŜXťXųXX<Fr^into any language or computer language, in any form or by any * * means, electronic, mechanical, magnetic, optical, chemical, manual or * * otherwise, without the prior written permission of Intel Corporation, * * 3065 Bowers Avenue, Santa Clara, California, 95051, Attention: Software * * License Administration. * * * \***************************************3 Intel Corporationܠ*** ERROR: Jumpout failed on board !. iRMX86//XENIX firmware status = > MULTIBUS address = >>:>>, 8085 address = >> Value read = >, value expected = > s*** ERROR: Board reset failed on board !, test aborted. Firmware: command byte = >, status byte = >. Q.OU.C&P.7&s9.?&.K&6&&GS&G_[&GP.7&s&G &G &W‰F&W &O щVFSP&t$ptr: procedure (tdt$ptr) external; declare tdt$ptr pointer; end td$set$tdt$ptr; td$this$is$demon: procedure word external; end td$this$is$demon; td$display: procedure (string$ptr) external; declare string$ptr pointer; end td$display; td$display$char: procedure (ch) external; declare ch word; end td$display$char; td$display$number: procedure (number, format) external; declare number word, format word; end td$display$number; td$masked$message: procedure (string$, usart_init_name (*) byte data('USART INITIALIZATION', null), pic_init_name (*) byte data('PIC INITIALIZATION', null), ppi_c_name (*) byte data('PARALLEL PORT C', null), usart_irv_name (*) byte data('USART INTERRUPT VERIFY',null), timer_irv_name (*) byte data('TIMER 4 & 5 INTERRUPT VERIFY',null), baud_rtv_name (*) byte data('BAUD RATE VERIFY',null), usart_load_name (*) byte data('USART LOAD TEST',null), uct_name (*) byte data('USART CHARACTER TRANSMIT', null), l, td$v (16) word external; sq$pit_init: procedure byte external; end sq$pit_init; sq$usart_init: procedure byte external; end sq$usart_init; sq$pic_init: procedure byte external; end sq$pic_init; sq$ppi_c: procedure byte external; end sq$ppi_c; sq$usart_irv: procedure byte external; end sq$usart_irv; sq$timer_irv: procedure byte external; end sq$timer_irv; sq$baud_rtv: procedure byte external; end sq$baud_rtv; sq$usart_load: procedure byte external; end sq$usart_load; e byte */ sync (2) byte, /* synch char(s) */ /* if in synch mode */ com_byte byte, /* command byte */ baud_cnt_l byte, /* timer init value LSB */ baud_cnt_h byte) /* timer init value MSB */ public data( 4EH,0,0,37H,8,0, 4EH,0,0,37H,8,0, 4EH,0,0,37H,8,0, 4EH,0,0,37H,8,0 ), sq$5_clof word public data(0), /* iSBC534 clock frequency */ /* 0 = 1.2288 MHz 1 = 2.4576 l (0,0, @sq$pit_init, @pit_init_name, 0,0, 0,0, @sq$usart_init, @usart_init_name, 0,0, 0,0, @sq$pic_init, @pic_init_name, 0,0, 0,0, @sq$ppi_c, @ppi_c_name, 0,0, 0,0, @sq$usart_irv, @usart_irv_name, 0,0, 0,0, @sq$timer_irv, @timer_irv_name, 0,0, 0,0, @sq$baud_rtv, @baud_rtv_name, 0,0, 0,0, @sq$usart_load, @usart_load_name, 0,0, 1,0, @sq$uct, @uct_name, 0,0, 1,0, @sq$ucr, @ucr_name, 0,0), pit_init_name (*) byte data('TIMER INITIALIZATION', null)ptr, msg$type) external; declare string$ptr pointer, msg$type word; end td$masked$message; td$can$print: procedure (msg$type) word external; declare msg$type word; end td$can$print; td$new$line: procedure external; end td$new$line; td$read$line: procedure(buffer$ptr) external; declare buffer$ptr pointer; end td$read$line; td$detmon: procedure external; end td$detmon; declare td$version (4) byte external, td$debug word external, td$erronly word externa ucr_name (*) byte data('USART CHARACTER RECEIVE', null); /* * declare configuration variables * * the defaults given here are set for an iSBC534 * jumpered for XENIX. * */ declare sq$inhibit_u byte public data(00000B), /* inhibit usart testing */ /* bit 0 = usart ... bit 3 = usart 3 */ /* bits 4-7 not used, 0=test 1=inhibit */ sq$un_init (4) structure( /* usart initialization data */ /* used for tests 8 and 9 */ mode byte, /* usart mod sq$uct: procedure byte external; end sq$uct; sq$ucr: procedure byte external; end sq$ucr; declare user$number$of$tests word public data (10), user$tdt (10) structure ( flag byte, /* recognize/ignore */ overlay byte, /* not used */ addr pointer, /* addr of test routine */ name$ptr pointer, /* addr of test name string */ err$cnt word, /* error count (init to 0) */ exec$cnt word) /* execution count (init=0) */ public initiaMHz */ sq$cpu_clof byte public data(1), /* cpu board clock frequency */ /* 0 = 153.6 KHz 1 = 1.23 MHz 2 = 2.46 MHz */ sq$cascaded byte public data(true), /* iSBC534 timers */ /* 4 and 5 cascaded */ sq$cpu_base_port word public data(0C0H), /* base port for cpu's 8259 */ sq$cpu_timer byte public data(0), /* cpu timer used for tests */ sq$cpu_timer_intr byte public data(0), /* interrupt level of cpu */ /* timer used for tests */ sq$ /* SO THAT SDT534 CAN LOCATE ALL OF THE PICS */ /* ON THE iSBC534 BOARD IN ORDER TO SERVICE */ /* THE INTERRUPTS. */ /* */ sq$number_of_boards byte public data(1), /* number of iSBC534 boards */ /* in the system */ sq$board_in_test byte public data(0), /* the iSBC534 currently */ /* being tested */ sq$board_loc (5) structure( /* this structure describes the */ /* the iSBC534 boards in the system */ / 040H, 3, 3, /* iSBC534 board number 1 (if needed) */ 0FFH, 0FFH, 0FFH, /* iSBC534 board number 2 (if needed) */ 0FFH, 0FFH, 0FFH, /* iSBC534 board number 3 (if needed) */ 0FFH, 0FFH, 0FFH); /* iSBC534 board number 4 (if needed) */ end config; cpu_308$309 byte public data(false), /* iSBC308 or iSBC309 on */ /* cpu board */ sq$u_t (4) byte public data( /* usart - timer match */ 0, /* timer jumpered to usart 0 (Rx and Tx) */ 1, /* timer jumpered to usart 1 (Rx and Tx) */ 2, /* timer jumpered to usart 2 (Rx and Tx) */ 3), /* timer jumpered to usart 3 (Rx and Tx) */ /* */ /* ***** WARNING ***** */ /* */ /* THE FOLLOWING INFORMATION MUST BE CORRECT */  /* */ /* the array dimensions must not be */ /* changed. */ base_port byte, /* the base address of the iSBC534 */ int_level (2) byte) /* the interrupt level of the pics. */ /* int_level(0) = pic 0 */ /* int_level(1) = pic 1 */ /* an interrupt level greater than 7 */ /* indicates that the pic is not */ /* jumpered to an interrupt */ public data ( 030H, 3, 3, /* iSBC534 board number 0 *ſXXVXXXxA6&D&GSP^FF.K&GF&GF&GF&G&G&G6&D&G&G P]˼&YYV (XPYaXfV kV XDPRAMPLM86 V2.14/23/84 17:18:48ɠ 8VVV VVVV  5 ].# Copyright1983 Intel Corporation̠ -*** ERROR: Dual Port RAM test on board !. MULTIBUS: expected = >, read = >, address = >>:>> 8085: expected = >, read = >, address =SPsB.&.&6&&GS&G_[&G.&P.&s:&G &G &W£&W &O щ FSP&G&OF.&ȱ.F&9rPsFPFF<v<u(FF;@.&ȱ.&HF;P@FX. &SvFF<:w.&F XXYYY Y%V,X8X@XHYVYeXjV qXYĄX̉VĔXĜXĤYIJYXXV XYYY&G&OF.?&ȱ.;F&9rPsFPSv FF&GF&G&>&G&G2&G&G&G&GZ&&G.7&.G&P.G&s6&|u.7&.G&՚.7&s{.?&.K&,XXYYV%X1X9XAYOY^XcV jXxYāY̲V ĸYļYYXXY V YY#Y.Y6Y>YGYPYYYbYkYtY|YňXŐX͚V͟V ŦXűY >>  *** ERROR: Timeout occurred on board ! while testing Dual Port RAM. Firmware: command byte = >, status byte = > B*** ERROR: Board reset failed on board !. Dual Port RAM test aborted Firmware: command byte = >, status byte = >  7 89*&5? >0!6~U">6~>Z6 V U .U . &P.&s9.&.&6&&GS&G_[&GBP.&rYPYV %Y)YCXSXńYʼnXŗXŮYŴYŹXV YYXY: uFQQP;PS&G&G&G&O&&GF.&,P.&s6&|7tF.&ښFsB.&.&6&&GS&G_[&G.&P:.&,P.&rFtO]P Y XXY!V&Y*Y1Y5Y Q*** ERROR: Unexpected interrupt occurred from board !. d Board interrupt level &&GS&G_[&GJP.&svFF<w.&Fu&G &W‰F&W &O щVFSP&G&O &O.&ȱ.&@ &G.&.&@ &G&&G.&P.&rFFF<w.&Fל XXYYX'X5XGXUXZV dXlXwY|VăXďXėXğYĭYļXV XVXY,V 2Y6Y>, free bytes = >> Actual: buffer ptr = >>, free bytes = >> Number of chars output = >> *** ERROR: Wrong input buffer pointers for port ! on boar= Master level ! Firmware: command byte = >, status byte = >. נc Board interrupt level = Slave level ! Firmware: command byte = >, status byte = >. s J*** ERROR: Board reset failed on board !. Test aborted. Firmware: command byte = >, status byte = >. "4 SEND INTERRUPT NOT CONNECTED, NO TESTING DONE  . U .&.&.&ȱ.&@Fu1. &F&PF. &.&S.&s9.&.&6XŎYŖYŞYŨXͳV͸V ſXVX Fu~ui.&.&P&.6&D&G&DF< s &F, .&P.&.&sFF<w.&Fu&G &&G.&P.&rFFF<w.&FFu~t`.&.&6&&GS&G_[&GF< s &F, .&P.&v]ÜXXX!V 'Y/X8YPX\XbXgV nXwXĕXĤYd ! Expected: buffer ptr = >>, bytes in buffer = >> Actual: buffer ptr = >>, bytes in buffer = >> Number of chars output = >> $` *** ERROR: Bad status on parameter command for port ! on board ! Firmware status = > ] *** ERROR: Bad status on output command for port ! on board ! Firmware status = > w\ _*** ERROR: Bad status on input command for port ! on board ! Firmware status = > h *** ERROR: Firmware diagnostics failure on board ! ROM checksum eze (2) ; ;--------------------------------------------------; ; ; Link the object files ; ; ;--------------------------------------------------; LINK86 & monitor/sdtmon286.lnk, & ** the test monitor, of course ** sdt534.dir/obj/mline.lnk, & ** the main and utility procedures ** sdt534.dir/obj/sdt534cnf.obj, & ** the configuration module ** sdt534.dir/obj/tests.lnk, & ** and the tests thems.&SFsB.&.&6&&GS&G_[&GEP.&&uiF.6&.&.&S&G_^&D&u#&u&uvP&G &W &GЉ&G &O FFrF<sPsFF]휟 X XYYX$Y)V7X?XGYUYdXiV pXxYĉXđXęXĢYIJYļXYXYXXV YY YYEV f 1UFF&F & ** directly beneath /sdtdir in the ** PRINT (sdt534.dir/lst/sdt534.mp2) & ** directory ** RESERVE(00h to 0100FH) ; ;--------------------------------------------------; ; ; sdt534.csd completed ; ; ; The reconfigured sdt534 can now be invoked by ; ; ; booting /sdtdir/sdt534 ; ; ;--------------------------------------------------; ;-=-=-=-=-=-=-;-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=- ; ;--------------------------------------------------; ; ; sdt534.csd ; ; ; Generates the reconfigured sdt534 ; ; ;--------------------------------------------------; ; ; compile the user configuration module PLM86 sdt534.dir/src/sdt534cnf.p86 & PRINT (sdt534.dir/lst/sdt534cnf.lst) & OBJECT (sdt534.dir/obj/sdt534cnf.obj) large optimirror. Computed cheksum = > z_ *** ERROR: Firmware diagnostics failure on board ! RAM failure. Expected value = > àn v*** ERROR: Firmware diagnostics failure on board ! PPI initialization failure. Value received = > Si *** ERROR: Firmware diagnostics failure on board ! PPI operating failure. Value received = > E*** ERROR: Board reset failed on board !. Firmware verification aborted. Firmware: command byte = >, status byte = >. R .UQ.&elves ** monitor/sdtlrg.lib & ** the monitor library ** & TO sdt534.dir/obj/sdt534.lnk & PRINT (sdt534.dir/lst/sdt534.mp1) INITCODE ; ;--------------------------------------------------; ; ; Locate the linked files ; ; ;--------------------------------------------------; LOC86 sdt534.dir/obj/sdt534.lnk & ** the bootable test will be found ** TO sdt534 SPF&G&G&G%&&GF.&P.&s06&|u&G:FuF.&&GĚFs5F.&.6&&G6&D&GPFFrvPU FFrvPP2 FFr".&ȱN.&@s&G&OFSP &FF1w&*Fu&G2&G&&GF.&PFFF.YYY"V (Y,Y3Y;Y=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=- .&2P.&rF.&P.&s<&Gt&O:Nu <uF&G~tǰF.&븚Fs5 Y)Y7YGYbXjV{XĄXđYĝX̢V ̹XXXXXX,YEYKV QYUYZXeVjV qX{VŇX͑V͖V ŝXŨYYXVaK  F.&.6&&G6&D&G_PFFrvP2P2 FFs&G2&G&&GF.&P.&s06&|u&YY%Y9YLYTYYYcXlXĈYęYģYīYĵYXV YY0 2 .U+&G &W £$&G &W £&&W&Oщ(9F u9VtwF .&.6&&GF &GF &GF&GN&O&&O&&O(&O(&O &G F&G P++]PX YY%Y8YLY^XgXēYĝYĥYįYXV YYINITTPLM86 V2.14/23/84 17:20:28ҠaVVV VVV._](DYMYUYdXnVsV zXąYġXĪY̴VXXYXV XX+X@XQYjYpV vYzY~YŕYŢYŭYŵYŽYXVV X &sb&Gt;&O:Nu):uN&uF&uF&G~t~vF.&뒚Fs5F.&.6&&G6&D&GPFFrv2PU FFr2.&ȱN.&@rQPP2 FFs.&ȱN.&@r&G &OFSPG:FuF.&&GĚFs5F.&.6&&G6&D&G_PFFrv2PP2 FFs .&F]~yXXY(X-V HX[YfYnYvYĄX̎V̓V ĚXĥYXYVXXYX V 'X8Xà U .U*&G&W£&W&GЉ &G&O"9Vu H;"txF .&.6&&GF&GN&OIQ&OY&O &O &O"&O"&O &G F&G P**]g_X # Copyright1983 Intel Corporation=?*** ERROR: Timer ! on board ! did not count, mode = ! ڠxx*** ERROR: Timeout occurred while testing timer ! on board !. Firmware: command byte = >, status byte = >. t}*** ERROR: Board reset failed on board !. Timer test aborted. Firmware: command byte = >, status byte = >. ۠L3= '%1 ; DMJ uSe>0>U>>2=>>>>og">c d j 6&7' Sv FeQ#XXYYX&Y+V0Y9XAXIYWYfXkV pY{YĀX̅VĐXĘXĠYĮYľYXV YYVYXX YY&X+V 5Y@YIY^YrY{V ŁYŅYōYŧXŷXYV YYYXQ5QPOPS&G&G&&G.&,P.&s6&|Lu.&ښsBF.&.6&&G6&&GS&G_[&GxPFF<smline.lnktests.lnk@@ ff|f''Jz.U.&.&Ss9.&.&6&&GS&G_[&GPrUPSPs>.&.&6&&GS&G_[&GxPFF<s^rWvSPPs9.&.&6&&GS&G_[&GPF뛠sx&G &G &W£&W &O щFSP&&G&OF.&ȱ.F&9rPsFPr v Fs .&&GLU.&,P.&r]qX VYYY!Y)Y1Y;Y@XJVOV VXaYmYrXzVYċXĔXġYįYľXV YXYXYX VV X#V(V  .UQQ^.&G"^.&G,^.&G*^.&G>^.&GAFszF<rp.^. &G4^.&G6Pvr2Ft<u'&G4^.&G6Pvr&G4^.&G6PvrU~u(.&ȱ.&@s &G4 &G4^.&G6PvJ]B XY X$Y4Y7YFXTXbYmY|XĀYĐYDUQQFF~w#FFF NFFu׋F]UQF.&F&GL,P.&s6&|LuF.&ښFsKF.&.6&&G6&&GS&G_[&GxP.&F]%H XY!V&V -X8YIXQVbXkXxYting USART ! on board !. Firmware: command byte = >, status byte = >. y *** ERROR: Board reset failed on board !. USART test aborted. Firmware: command byte = >, status byte = >. NJFB^~ONi       b ؠ Ơ  ,՜5XXX XXXXX X$X <.^.&G &GM&GNPvr<^.^.  0&G4^.&G6Pvhr PvUri&GN&OMF~vPF^.G;Fu3F.&.6&&GF&G?P.&F|XXY%X)Y7X;YIXMY[X_YjYĄXĎXĒYĠXĤYĴYYXYYYXY YYY"Y0X:X@YNXRYbYeYuYxYŀYXźXXXV XY.r2^. ĆYĕX̚V ġX&INITUPLM86 V2.14/23/84 17:21:02٠DVVV VVmX]&#lCopyright1983 Intel Corporationfw*** ERROR: Async USART ! on board !: Status = >, Parity = !,!, Length = !, Baud = >>>, Stop Bits = !.! Mh*** ERROR: Sync USART ! on board !: Status = > ,Parity = !,!, Length = ! Sync chars = ! Nb Char transmitted = > .} Char received = > x*** ERROR: Timeout occurred while tesPMJG?94 (/$XXX XXXX,D&53XXX XXXXX X$X0ADa*@wPp+T0ADa*@wPp+J$&0?+*3%-7X&  s0Ƞ489 @@7CZ.XUQ.P&P.D&s9.L&.T&6&&GS&G_[&G PFF<wf.D&rUPSPP.D&{ ?ueZ tr͎ w K2MODESYNCCOM_BYTE BAUD_CNT_L BAUD_CNT_H- y0 ww OurQ trގu h t rЎN tr tr tr"  tr$  tr&Ў tr(Ž t rώ w tr+ t rt trČTDSTARTSQNUMBER_OF_BOARDS SQBOARD_LOC TDDISPLAYTDDEBUG TDV SQINHIBIT_U S v.t.T^Y^.FF.6L&ȱNȋ.H&pS^.Ps3&.6T&D&G&DP.D&vFP^.DWwFt4.L&ȱNȋ.H&pSPPs1&.6T&D&G&DP.D&])X X&X)Y-Y2X;X^XcX|XćXĞXĦYIJX̸VYXYXV XXX/X7Y@VJYRX[YgXlV sXzV fUF^SSs,NUMBER SQRECEIVE' SQSEND_MSG@ SQTIMER_START, SQTRANSMITm% SQYES_OR_NO#c SQCLEARTIMEOUTE SQREADTIMER- SQRESETTIMER SQSETTIMEOUT SQSTARTTIMER SQSTOPTIMERSQINTR< SQINTR_SET. VERSION2P0ASM86.86 V2.0wCopyright INTEL CORP 1983MAINQPLM86 V2.14/23/84 08:23:48M? VV W]4$Copyright1983 Intel Corporationݠ"!Software Program # 145408.030|k?&Ȋ:rAC&RZR VERSION2P0CODE??SEGCGROUPSTACKMEMORYDATA MAIN_CODE MAIN_DATA PBLIX_CODE PBLIX_DATA RESET_CODE RESET_DATA UTIL_CODE UTIL_DATA TIMER_CODE TIMER_DATA GINTH_CODE GINTH_DATAhH@i@K ŘT|D@ @ v@ @  @7՘@@I@"@(@*܎ trd{|mw_ BASE_PORT INT_LEVELB yƎwx wxr w@w@/ wl{|e w bzs9.L&.T&6&&GS&G_[&G PFu.D&rXPS8P.D&s9.L&.T&6&&GS&G_[&G P.D&r8FF<w-.L&ȱN.H&@rQFu̚] X XYYV#X/X7X?YMY\XaV sXŸVďXěXģXīYĹYXV XYXVXX XY"Y1X6V =XTXiXV U9~ ^.4F츋.6T&.L&&DFF<QUN_INIT SQCASCADEDSQCPU_BASE_PORT SQU_TSQBOARD_IN_TEST TDDISPLAYCHAR TDDISPLAYNUMBER! TDREADLINETDDETMON SQCPU_CLOF SQCPU_TIMERSQCPU_TIMER_INTR_]SQBANK_AFTER_INTR SQBASE_PORT  SQCPU_INTR SQEOI  SQFIRST_TIME  SQINTR_LEVEL SQINT_ON_PIC SQPARAM SQPARAM_W SQPIC_INTR_ADDR SQSECRETSQWAIT_FOR_TIMEOUT USERCOPYRIGHTp USERSIGNON!- USERRESETHARDWAREUSERRESETSOFTWARE搜 SQCHIP_INIT# SQCR_ONLYW SQGET_NUMBERm* SQINCREMENT_P@)SQPROMPT_&.6T&D&G&DPFFFsF< r^&F^ .4SFPs%&.6T&D&G&DPF$=<tF.T&GSFFrJ^ .0SFPs,&.6T&D&G&DPFFFFrFs^ .4SFPs.&.6T&D&G&DPF렊F$=<uF둁~v=F.T&GSFF.T&bPF .T&F릊Fs윿YV Y(X1Y=XBV wX{Y ZR Z uG&Ӝ#Y YY#YVY\YcVPBLIXPLM86 V2.14/23/84 08:24:19ΠS]0S!SYSTEM DIAGNOSTIC TEST - 534, V3.0 COPYRIGHT 1982, 1983, INTEL CORPORPORATIONP,pCOPYRIGHT 1982, 1983, INTEL CORPORATIONRESETPLM86 V2.14/23/84 08:24:31Ԡ8 P>VVV VV V V V V $V( , 0 Q ]. , *** WARNING *** Y# 4Y;Y@ @OY] rYyY~ @ċYğY̲ YYYh .UQ&F&f&&&&r&&W&F&]˨8X YY"Y-Y6Y=YPY_YqY|Yj uUQQ P&PPF~w@~tA r-F&OP&PPFF&F&:FsYF&uPF&PPFF:Fu6F&COUNT FOR USART ! 3 ENTER NUMBER OF iSBC 534 BOARDS IN THE SYSTEM * O INVALID NUMBER OF BOARDS; RE-ENTER ^* u ENTER BASE PORT ADDRESS FOR BOARD ! a)  > NOT A VALID BASE PORT; RE-ENTER *  ENTER BOARD ! PIC ! INTERRUPT LEVEL !  PIC ! NOT CONNECTED ( ENTER NUMBER OF THE BOARD TO CHECK (% " NO BOARD ! TO CHECK; RE-ENTER h' CCHANGE USART--TIMER CONFIGURATION 5 f ENTER TIMER NO. FOR USART ! TRANSMIT/ RECEIVE s  ! NOT A TIMER; RE-ENTER l TIMERS &:Fr-F&"P&PPFF&]4Y Y,Y2Y7 @=YJ YY٠ UQQFCPvFF&GFrF~vF&fPF&PPF~w4F&PF&PPFFF&FFtkP&7&]?o YV %YGYMYR @_Yl āYćY̌ @ęY̦ ļYYVY Y UQ&X&@ XYVY#Y,Y?YDVL _YhYrYȲV̌ ĚYļYYY @ YY!Y(Y?YDVL oYuYz @Ÿ́ @œY͠ űYŷYͼ @Y Yd PF&@PPPFX&@PF&@PPPFX&@PF&@FF&@FvPFFN&HFN&HFFtF&]igY @ ANSWER ALL QUESTIONS CAREFULLY THIS TEST SUITE CANNOT CONTROL RESULTS IF IMPROPER VALUES ARE GIVEN FOR INITIALIZATIONS OR PORT NUMBERS ܠ' SET GLOBAL V VARIABLES TO DEFAULT I" INHIBIT USART USAGE IN TESTS I 3 INHIBIT USART ! USAGE 1 LCHANGE USART CONFIGURATION FOR TEST 8 AND 9 ` yENTER VALUES FOR USART ! A#  ENTER MODE BYTE FOR USART ! 0  ENTER SYNC CHAR 0   ENTER SYNC CHAR 1 &  ENTER COMMAND BYTE FOR USART ! %  ENTER TIMER PF&PPFFF&F~vF&F&GPFNȋ&@PPPFNȋX&@FNȋ&x w-FNȋ&@F&PFFtBFFtPY VY EYKYP @VYc rY}YđYėY̜ @īY̸ YY @Y Y(Y2Y9Y> @TYb zYŒYŰYżYY @YVҠf d&PPF4 AND 5 CASCADED  .U ,P&F&&rFPvFFr&&G&GFPvFF&GFrF~vF&N&tFF3PvFFrN& &N&"&FFttFLPvFFrF~vtF&yPPF&PPPFX&PF&@PPPF&F&:FsF&F& F& F& F& F& FFtR].YY&Y>YVYnYĆYĞYĶYUTIL8PLM86 V2.14/23/84 08:24:58ˠ ZVV O ],* USART ! STAYING UNREADY ON TRANSMIT Ѡ o 0123456789ABCDEF: , | yY͠ ([y] or n)` (y or [n])U  6v6v u&]^GX YYY$Y3YFYOYTYYYfYmYĀYĉYڠ E.UQ&F<v?6&& ˆF t u&FF&N ˆF t u&RFZ&  t u&&а t u& @&]ˆBX YY%YGYYYYĒYįYĹYYYYX 6YQPQRSVW.Us;v&& 6&<v]_^[ZYX)&P~!uF&PPQ~%u9F&VFʴ&ЉVFRP"F W.UP]EX YV٠ m.UQQFPG$u+JVs.UQF< r.!7?GQYaiq~AEAJARAA #A (A -A û %,VV V Vq M]*I 0` .U&sv&v96&"¢ t u&&"¢ t u&]ÜI X YYY$Y7YJYSYXY]YjYqYĄYčY .U]Μ X Y .U] X Y .U&<v@6&& ¢ t u&& ¢ t o .UQ^ &?uJF^ F&8r;FS&_[&WF&F~wFuFu]D XV4Y m.UQQFF~vuF&P6~@uFXYY Y&Y,Y4Y>Y0" YQPQRSVW.U]_^[ZYXX3 .UF& <v@6&& ¢  t u&  & ¢  t u&Р s&& & t u&&&  û &&O&. -:E:J:R:: #: (: -: û %: û: û : û&&O]UQQFsPP uyrG G$u+JVsFF~sFFF]ҜEXYYV#Y(Y-V3Y7YBYHYNYRYVYˠ: .U[Pv v]Pv mF ]XV V"V *Xv .U F & F^FFNFF FFFFPv FPv ]:$XY/Y6Y@YZXgXTIMERPLM86 V2.14/23/84 08:25:24ѠA ûA û A û&&OF FF&8rf&P:Vu&R XGF&P:Vu&R X GFu>t]蜼XXX!X#X%X'X)X+X-X/X1X3X6X>XFXPXXX`XhXpX}XĊXėXĬYıYĸYYYYYYYY!Y*Y1Y<YQPQRSVW.U& "& t!$ "& & 8r؊W  us^ .4SFPs*&.6T&D&G&DPUF$=<tPF.T&GSF.T&bPF؜XX2X6Y@VJYRX[YgXlV ąXčY̒V ĠXĦX̫V ĵXXYVYXYXV X"Y'V 1X7X v]_^[ZYX@VXY&Y2Y5Y>YBYMYUY^YbYfYpYxY~YĊYĔYpPAPSVVV Vc]$#Copyright1983 Intel CorporationРX*** ERROR: PIC initialization failed on board !. Mask set = >, mask read = > ns*** ERROR: Timeout occurred in PIC test on board !. Firmware: command byte = >, status byte = >. w*** ERROR: Board reset failed on board !. PIC test aborted. Firmware: command byte = >, status byte = >. hPQBRe.cUQQ.[&P.S&s9.W&._|X́VČXĔXĜYĪYĹX̾V XXYXVXXYYX#V *XAX[YeVpXxXŀYŎYŝX͢V ũXŲXYVXXYyU&G_[&GsP.S&.S&r5NF:t+.W&._&&O&GP.S&F]˝5YXV X'X=XEXSXXV _XlV bPPIALPLM86 V2.14/23/84 17:21:59͠VVV V]"#Copyright1983 Intel CorporationΠ*** ERROR: { Iuod tr׎us  tr ю trw P ֎ trώ  E tr̎  H tr{|eu`U trȎ trlw`ˎ BASE_PORT INT_LEVELB ywxݎw@0 a tr wَ92MODESYNCCOM_BYTE BAUD_CNT_L BAUD_CNT_H- y0"#o w$ | SQCASCADEDSQBOARD_IN_TEST SQBASE_PORTSQPARAM SQCR_ONLY SQSENDrVPSsB.&.&6&&GS&G_[&GP.&.&rYPSPsB.&.&6&&GS&G_[&GP.&.&rYPSFPsB.&.&6&&GS&G_[&GP.&.&r6N.:t+.&.&&G&OP.&.&rYPSPFX XYYV#X/X7X?YMY\XaV hXrXxY}VĈXĐXĘYĦYĵX̺V XXY INITTPLM86 V2.14/23/84 08:25:49ʠɜVVV VY]62 ERROR: TIMER ! DID NOT INITIALIZE, MODE = ! @-:ERROR: TIMER ! DID NOT COUNT, MODE = ! cӠ i٠ o6&7' u@@_ {ff۠f''k.U F&RZ FF<wP&7PPFuF~vwFF:v_:u &sP&7PP&^cȈNiFu^ o 0VFFFINITTSTACKMEMORYCODEDATA INITT_CODE INITT_DATA INITU_CODE INITU_DATA INITP_CODE INITP_DATAPPI_CODEPPI_DATA URTIRV_CODE URTIRV_DATA TMRIRV_CODE TMRIRV_DATA BDRTV_CODE BDRTV_DATA URTLDT_CODE URTLDT_DATAUCT_CODEUCT_DATAUCR_CODEUCR_DATA@@T|D@k@Z @ @7 Ԙ@ @K @d@@@O@@r@-@@e@?@@X{|m wm trdzPPI Port A verification on board ! failed. Pattern: written to port A = >, read from port A = >. z*** ERROR: Timeout occurred on board ! during PPI verification. Firmware: command byte = >, status byte = >. Fs*** ERROR: Board reset failed on board !. Test aborted. Firmware: command byte = >, status byte = >. JAUf.UQ.&P.&s9.&.&6&&GS&G_[&GP.&_MSG SQTIMER_START SQINHIBIT_USQU_T SQWAIT_FOR_TIMEOUT SQCHIP_INIT SQTRANSMIT SQRECEIVE SQSTARTTIMERSQCLEARTIMEOUT SQSETTIMEOUTTDDEBUGSQCPU_BASE_PORT SQBOARD_LOC SQINTR_LEVEL SQINT_ON_PICSQPIC_INTR_ADDRSQBANK_AFTER_INTR SQINTR_SET SQSTOPTIMERTDV! SQUN_INIT% TDDISPLAYCHAR TDNEWLINE SQPIT_INIT " SQUSART_INIT x SQPIC_INIT - CLEAR_AXSQPPI_C  SQUSART_IRV  SQTIMER_IRV Ð SQBAUD_RTV  SQUSART_LOAD SQUCT SQUCRXVXXY YXV &X/X=YGVRXZXbYpYẌ́V ŋXŔXŢXūXųXXV XXYX'esB.&.&6&&GS&G_[&GP.&.&rYPSFPsB.&.&6&&GS&G_[&GP.&.&r6N.:t+.&.&&G&OP.&PSPsN.&rB.&.&6&&GS&G_[&GP.&]IV XvPF^o^ uVFt<uV^{VF~2wFu^uV^ o 0VFFFvPqFF;FuF&F&G PF^㋇;FuF&F&G:PFFtFtF]{X VY:YDVpY~Y̊VĐYĜYĥYĬYĺYYYY3YBYxYŅY͊VśYŧYŴY͹VDUQQFF~w#FFF NFFu׋F]ÀINITUPLM86 V2.14/23/84 08:26:32ѠBJ&7FPFF:Fu F8uFr(FV&GF&GF&GSFFF] (YY"V QY`YgVpVuVāYďYĠYĮY̳V̸VYV YYVVV YY)Y7Y ACTUAL = > .U /&RZ FFFF<vFFFFP+&7FFFBFP+3YYY YYYYY Y$Y <~vql ,l$YYY YYYY,H3YYY YYYYY Y$Y 0ADa*@wPp+0ADa*@wPp+$&0?+*3%-7   @N@N7 @@@7@ @@@@7TRANSMIT FAILED ՠ1RECEIVE FAILED 3F?& F:tC&&OPF?& F]^ X VY,Y2Y8V >YLXUYkYuYzVĄY̒XěYıYĻYVY .U]ˠX>URTIRVPLM86 V2.14/23/84 08:27:36̠8 H5VVV V VVVV V$V(V,V 0V O ],P PIC 0 INTERRUPT NOT CONNECTED, USART INTERRUPT VERIFICATION ABORTS G TERROR: BOARD !, PIC !: CANNOT SET MASK"FF]Y Y6Y9Y=YDYbYgYYĐYėYģY̩VYYYYYYYVY!Y9YOY_YmYwY|YŗY1UN& ^SJ&7FFFsF< rk^&FV N&¶FR&dPFuR&sV N&¶FR&rFPFs$v J&7vV N&¶FR&dPFuR&sV N&¶FR&rF1PFFsv VV V VV VU]2zpERROR: ASYNC USART !: STATUS = > ACTUAL = > EXPECTED = > PARITY = !,! LEN = ! BAUD = >>> SB = !.! tERROR: SYNC USART !: STATUS = > ACTUAL = > EXPECTED = > PARITY = !,! LEN = ! SYNC CHARS = ! VNJFB^~ON`}* jD r= z6 / #     ,jrz&7FF~wJV/&жFFN:t#F3&&OF&GPFFFuFtWV/&F] ;X VYVY\V sYyV ĒYįYYVY&PPIPLM86 V2.14/23/84 08:27:17͠ ? VVVܠ Q ].@ ERROR: PPI PORT C FAILURE: ACTUAL = > EXPECTED = > f < t .UQQF?&RZ <PG&7?& UF?& FU:tC&&OPF?& F.UQFFF<wB&uP FFu݊F]؜X V YDUFFN&~ FFpFV&FFF< wwĴV^Y^VFFFF&0J&7^`PvFP^ĿHW FFu~FF&0J&7PPFF<wLĴ,V^Y^FFvFPĿHWT FFu~FF6DV^YvFP`S , ACTUAL = >, EXPECTED = > J ERROR: CANNOT SET ONBOARD MASTER PIC MASK, ACTUAL = >, EXPECTED = > 6J ERROR: CANNOT SET ONBOARD SLAVE PIC MASK, ACTUAL = >, EXPECTED = > !S #ERROR: WRONG INTERRUPT OCCURED, USART = !, BAUD = >>>, WRONG INTERRUPT = @ ` rERROR: RECEIVE INTERRUPT DID NOT OCCUR, USART = !, BAUD = >>>, USART RECEIVE STATUS = > b ERROR: TRANSMIT INTERRUPT DID NOT OCCUR, USART = !, BAUD = >>>, USART TRANSMIT STATUS = > Рb ,ERROR: EXTRA RECEIVE INTERRUPT OCCU&dP&r5v FFvvn FF"r&F~vjFNY V#YEYcYĀYĊYđY̖VĤY̫V̴V̹VĿYVY&Y-V6V;VHYWY`V eVkYpYuY|VͅV͊VŐYŹYŽYYVƠN m;u@NAV;ʱuA"r-F&8uF&G#PFFFt>t+&¶F&GPF>t+&¶F&GrPF&@&&? w.&F&PF&]&7& &&&l& s Ɔv.@tsP&7tFr@Ɔv1&t W"FFt&&& & F]8 XVY#Y-Y4YAYKYSYXVaYoYuV{YąYČYĖYĥYĵYYV YLYZYhYwY UěYĢY̧VĺYYYV UQQFF&8uFP&7FPFF8u@N:NuA r/F&GF&GF&GPFF&ȊN&F&8t@>tA"rF&G,PFF].NY)Y4V aYlYwY~ỸVĔYĨYĸYYYYYVTMRIRVPLM86 V2.14/23/84 08:28:04Р41VVV VVVVVMYQY^YbYqYxYĄY̊VĐYĞYĿYYYV YYYY&Y-Y6YBYIYNV\YgYŇYũYYYY# ~&GP]FNR&Y"F t u&F t u&FF:Fu'F&F&GP]&dP&rF~vv&F@FtFF~2"Fr~2rF@F&P^FFP&7vRRED, USART = !, BAUD = >>>, USART RECEIVE STATUS = > c ERROR: EXTRA TRANSMIT INTERRUPT OCCURRED, USART = !, BAUD = >>>, USART TRANSMIT STATUS = > t ERROR: RECEIVE FAILED, USART = !, BAUD = >>>, USART RECEIVE STATUS = >, CHAR ACTUAL = >, CHAR EXPECTED = > O YERROR: TRANSMIT FAILED, USART = !, BAUD = >>>, USART TRANSMIT STATUS = > 3 TESTING c ONN   l  C  @@2  @@7 .UF&FFBF"FFFFtX& F&0&7PP& ƆaƆb2ZP&7F]e-Y=YDYIV`YjYYĆY̋VĕYğYĴYĻYVYYYVY7Y=V  UQFF&xu&¶FFF8tF&@ȊN&@F&xt@>tA"r+F&GPFF&@F&GYPFF]EY!YIY^YoY}YĐY&FF~vFF&^&G^&G^&GF&0&7^P& Z F@[^a^cZP&7&& & F~u?&&&G&GF&GTP]&&@F~wNR&Y"F t u&F t u&FF:Fu'F&F՜ Y0Y, EXPECTED = > #JERROR: CANNOT SET ONBOARD MASTER PIC MASK, ACTUAL = >, EXPECTED = > , EXPECTED = > '7ERROR: TIMER !: EXPECTED INTERRUPT DID NOT OCCUR ;NERROR: TIMER !: INTERRUPT OCCURRED WHEN NOT EXPECTED .UF&&YĘY̞V ̩VĶYYY YYVwozUQQFj&dPj&s$*Fuj&rњ~uFF]P* YVV!V'Y2Y>YIYUVTURTLDTPLM86 V2.14/23/84 08:28:53̠4N1VVV VVVVV V$V(V ,VI]&CPIC 0 INTERRUPT NOT CONNECTED, USART LOAD TEST ABORTS GWERROR: BOARD !, PIC !: CANNOT SET MASK, ACTUAL = >, EXPECTED =  t u&FN:t&&OlFNR&Y"F t u&F t u&FN:t&&OP~u &sP&7PPFF<w&FuFFF뼜{Y3Y;YEVKYĄYċYĞYĥYİYYYYY&Y7YXYuYŊYŔY͙VŪYŸYVY&Y rF&R FV± ˆFZ~u&V&dP&V&D = >>00, USART RECEIVE STATUS = > dERROR: EXTRA TRANSMIT INTERRUPT OCCURRED, USART = !, BAUD = >>00, USART TRANSMIT STATUS = > ewERROR: RECEIVE FAILED, USART = !, BAUD = >>00, USART RECEIVE STATUS = >, CHAR ACTUAL = >, CHAR EXPECTED = > FRdERROR: TRANSMIT FAILED, USART = !, BAUD = >>00, USART TRANSMIT STATUS = > TESTING O ݠ $ 1 @N@N7!.UF&&@&&? w.&F&n` o \ Zڠ%O @@7F.UQFFF<wZ&uP FFu݊F]˸X V Y:DUf&RFXPNXȈFF<vF^&0b&7^KPf& O~ F@FFPb&7F^㋇FN;v+ȉN F+FF^㋇;FsCF FF6n&F&DF&DP&DX&DPFFt F]{WY,Y3YLYSY_YeVkYy@&< v'&F&PF&v&7&P &X &FsFF<w P> FFu&RZ&R Z F]ːP X VY%Y-Y8YFYKVTY_YeVkYuYYĤYĹY U,&FF~vFF&P&7PP&R ZR Z NFFN:t!&&&G&G&OL&&@F<vo,ȲR&Y"F t u&F> JERROR: CANNOT SET ONBOARD MASTER PIC MASK, ACTUAL = >, EXPECTED = > -JERROR: CANNOT SET ONBOARD SLAVE PIC MASK, ACTUAL = >, EXPECTED = > T&ERROR: WRONG INTERRUPT OCCURED, USART = !, BAUD = >>00, WRONG INTERRUPT = @ eavERROR: RECEIVE INTERRUPT DID NOT OCCUR, USART = !, BAUD = >>00, USART RECEIVE STATUS = > ߠcERROR: TRANSMIT INTERRUPT DID NOT OCCUR, USART = !, BAUD = >>00, USART TRANSMIT STATUS = > c2ERROR: EXTRA RECEIVE INTERRUPT OCCURRED, USART = !, BAUsEF&8t&F&tFNPF밚FrPFFF~2sFFF FP&7PP&RZ&R Z FtF]]YPYWV`VeVkY}YďY̘VĠYĮYĺY̿VVYVYVY-YBDRTVPLM86 V2.14/23/84 08:28:31РZڜVV V VV VK](=ERROR: BAUD RATE ON USART ! : ACTUAL = % EXPECTED = % KHMPF&]&7& &&&9"FF&&& F]ҜdXVY#Y-Y4YAYKYSYXVaYoYuV{YąYČYĖYĦYĴYYU4&FF~v3F&0&7^PFFt& ~͹ F~v)F@F΍FP&7FFt&& & F~u;&&&GF&G&G8u@~*uA r]F&^㋇&G^㋇&GF&GF&G&G*PFF&ȊN&F&8t@^tA"r ^GIF&^㋇&G^㋇&GF&G2PFF]Y)Y4V _YmYqYĀYĄYďYĚYĢYĪY̯VYYYY YY%Y)Y8Y H.U&?u&v 6&1c&RZ 6&<&1&7ǹ&p&p& ~&N&S&PS&PS&@C&.F FFFP&7&F& P~u&r&P&7FPFFu &r&rF&WPrupts from: USART ! on board ! Number of interrupts: expected = >, actual = >. Q^*** ERROR: Extra interrupts occurred while testing USART ! on board ! . USART ! receive caused > interrupts / USART ! transmit caused > interrupts ؠ*** ERROR: Timeout occurred on board !. USART interrupt test aborted. Firmware: command byte = >, status byte = >. *** ERROR: Board reset failed on board !. USART interrupt test aborted. Firmware: comSP&G&OF.&ȱ.F&9rPsFPSv FQQP8PS&G&GF8F?t %@FFFSv;PPvdPSF\FSPFsF<r.&ȱNȋ.&pSPPXXYYV#Y,X4XV EXNX\YfVqXyXāYďYĞX̣V ĪXijXXXXXV XYXV XX X(Y6YEXJV QXXV hURTIRVPLM86 V2.14/23/84 17:22:22֠uVVV VVV.s] #8Copyright1983 Intel CorporationW*** ERROR: Wrong number of transmit interrupts from: USART ! on board ! Number of interrupts: expected = >, actual = >. *** ERROR: Wrong number of receive interd&Gs&P&7v&Gs FPfN>X VYY#Y/Y5Y, status byte = >. 7- !+ 5 <>0>U>*>>>.\@ ] T^E_T"`%J*a-T2b5O:c=TCTHTMTRT1h;!!!!!!!!4> O2l7fM @N@N G.U .&Ps9.&.&6&&GS&G_[&GPs;&G &G &W£&W &O щFYpYsXxX͆VŕY͛V šYťYŬYXXYV s>.&.&6&&GS&G_[&GPrq~ ^.FFPSs>.&.&6&&GS&G_[&GPFr]F$ FPSFPs9.&.&6&&GS&G_[&GPrYFFPSFPs9.&.&6&&GS&G_[&GPs&&G.&,PXGYWXlXăYċYĔX̛V FOUQ.&G.^.&G0^.&G^.&G&.&&G7,P.&s6&|7u.&ښs9.&.&6&&GS&G_[&GPr:FF<w&&F&@FuFs~r.&&G7,P.&s6&|7u.&ښs9.&.&6&&GS&G_[&GPFXs.&PSRCCSDOBJLST.&s6&|7u.&ښs9XXY%Y4X9V ?YCYJXcXoYtVXćXďYĝYĬX̱V ķYYYVYXXY YX V %Y6Y@VEYNXVX^YlY{X̀V ŅYŐYŘYŢYŧXͱVͶV ŽXYYXVY.&.&6&&GS&G_[&GP.&Fr4F<s-.&ȱN.&@rQ(F&G7Us .&]=EX XY!Y0X5V >.&r.̜X YXY*X.Y &G..&&G7,P.&s6&|7u.&ښs9.&.&6&&GS&G_[&GPs2F&8@t?F.>&.&&M&E&@r$.&.6&&GF^P.&F.&S&_[&GPF&xtdFr'F.&.6&&GF^P.&F.&S&@_[&GPFt]\XX(X-V 4X@XMY]XbV qYćXĐXğX̤V īXķXYXV BDRTVPLM86 V2.14/23/84 17:23:04ՠ\VVV VVV.Z]#Copyright1983 Intel Corporation^=*** ERROR: Wrong baud rate &s9.&.&6&&GS&G_[&GP.&rXPSP.&s9.&.&6&&GS&G_[&GP.&s&G &G &W£&W &O щFSP&&G&OF.&ȱ.F&9rPsFPSv FQQP2PP&G&G.&r8FF<w-.&ȱN.&@rvXXYYV%X1X9XAYOY&E.&WPF.&ȱN.&@sH&8tJF.>&.&&U&E&&E.&_F&8tSF.&.6&&G.&F^PF&.&GPFF<vN:u0Y YXY#V(V /X:YFYKXSVXYaXiXqYYĎX̓V ĘYĬYļXXYXXV XX#Y2X;XMYZXaXpY~XŇXŖXşXͤV űYŻXXV YӠ+ &8t`Fon USART ! on board ! Baud rate: set = >>, actual = >>. *** ERROR: Timeout occurred while testing baud rates on: USART !, board !. Firmware: command byte = >, status byte = >. *** ERROR: Board reset failed on board !. Baud rate test aborted. Firmware: command byte = >, status byte = >. T n` %  h  (. $(/5>0!6~>*~"67v3A.U.&P.^XcV jXxY}X̂VĉXĕXĝXĥYijYXV XYYYYV Y!Y)YCXSXiYqV wY{YńYŇXŌXŖY͛VŠYŤYūYůYŸXXX<QFu̚]< V (UF&GF&FSP&FF)F4FFFsF<r.G&G^.G&G&&GF.&P.&s6&|uF.&ښFsFF.&.6&&G6&&PFFsF.&,P.&s6&|.tF.&ښFsBF.&.6&&G6&&GS&G_[&GPFs&G0&O/F^.O;s+^.G+FF^.G ;FsRF FF.6&.>&&D.GP&DX&DF&DF&D=PFFFs F.&]h XX#Y1Y@XEV _XiVnV uXĀYđX̙VĪXijXYYXV YX&X7XNXWXdXłX͇V ŢX3sdt544cnf.p86cmnlrg.libGS&G_[&GPFFr_FPSPFsBF.&.6&&G6&&GS&G_[&GPFsFF1w؊O&Fu&G&G&&G= YYY#Y)V /Y3YJYPYwXzYXčYĕYĝYĬX̶V̻V XYXVXX YY*X/V FYKXPVaXjXwYŅYŔX͙V YŽYYYYYYY sFF.&.6&&G6&&GS&G_[&GUQF.&P.&s6&|.tF.&ښFr:.&dP&G..&r&G.F]ĜA XVV "X-Y>XFVTX_VdV jYtXẎVUCTPLM86 V2.14/23/84 17:24:15Ҡ(%VVV VVVVV V-]#Copyright1983 Intel CorporationȠ#*** ERROR: No port specified 4>*** ERROR: Illegal port number (!) specified tsn*** ERROR: Timeouw.&Fu.&rPv7F^.At6&F@16 ԊF&G&GvP&G .&ȱ.&p])X XYYV#X.Y6X>YJXOV VXhXwXXďX̖VĬXĹYYXXXYY$Y+Y/Y8Y@YOYYXiXpVuV J2U.&?u.&v.6&>P.&.&](XXX$X*X/V 6X?X.xU&G &W‰F&W &O щ&OFSP &G&W£&G&O ]\(YY%V +Y/Y3YHY[YˠQU&.&.&P.&s/.6&|r&|r&D&D.&.&Ś.&s4F.&6&&GS&G_[&GnP]MYXX"V'V .X:XWX_XgVnX}XąYēYĢX̧V €UCRPLM86 V2.14/23/84 17:23:37Ϡ(t%VVV VVVVV Vt on port ! character transmitter test. Firmware: command byte = >, status byte = >. h*** ERROR: Board reset failed. Test aborted. Firmware: command byte = >, Status byte = >. QAABCDEFGHIJKLMNOPQRSTUVWXYZ0123456789 abcdefghijklmnopqrstuvwxyz_!"#$%&*() ʠ.UQ.&P.&s'&.6&&G&DP.&rF.&rcF.&.&ȱ.&pFF<w.&Fu&Gv&vFF<VFFFSPF&G&G &G&G&G.&ȱV.&@ &G.&N.&@ &G]SKYCV IYMYTY^YfYpYxYāXĘXĢYīXXYNU&.&.&P.&s .6&|r.&.&Ԛ.&s4F.&6&&GS&G_[&GnP]EMYXX"V'V .X:XHXPXXV_XnXvYĄYēX̘V IgUQ&G-r]#Copyright1983 Intel CorporationƠ#*** ERROR: No port specified 3>*** ERROR: Illegal port number (!) specified nm*** ERROR: No character received for thirty seconds, Firmware: command byte = >, status byte = >. p*** ERROR: Timeout on port ! character receiver test. Fimmware: command byte = >, status byte = >. gC*** ERROR: Board reset failed. Test aborted. Firmware: command byte = >, status byte = >. .U.& * * iSB?-xxx System Test for SDTMON. This module * * has been designed to facilitate the porting * * of diagnostic software from GPCP support to * * SDTMON. * * * * LANGUAGE DEPENDENCIES: * * * * PLM/86 9XAYMXRV YXkXzXĂXĒX̙VįXXYXXX%X@XzXŌXŻXVYJ,.&ȱ.&p]˽XXVV gJU.&?u.&v.6&>P.&.&]÷(XXX$X*X/V 6X?X.(U&G &W‰F&W &O щVFFFSPF&G&G &O&G&O&O.&ȱV.&@ &G.&N.d, transcribed, stored in a retrieval system, or * * translated into any language or computer language, in any form or by any * * means, electronic, mechanical, magnetic, optical, chemical, manual or * * otherwise, without the prior written permission of Intel Corporation, * * 3065 Bowers Avenue, Santa Clara, California, 95051, Attention: Software * * License Administration. * * $TITLE ('Configuration Module for iSBC-544 System Test') $SUBTITLE(' Module of SDT544 V1.0, 3 Jan 83') Configuration: DO; /*************************************************************** * TITLE: Configuration * * * * DATE: [] * * * * ABSTRACT: This is the configuration module for theP.&s'&.6&&G&DCP.&rF.&rgF.&.&ȱ.&pFFw.&Fuv.&Gs&v_.&rv.&Gsv=Ɔ.&rsv~.&rvP=F.&rFF;Fs!rvu ƆvF.&Gs4F.&r#NF;s+FvQPF.&Gs FF;Fr0F&G GXXYYV&X1Y * * * ***************************************************************/ /*****************************************************************************\ * * * Copyright Intel Corporation 1982, 1983 * * All rights reserved. No part of this program or publication may be * * reproduced, transmitte&@ &G]GPYCV IYMYTY^YhYpYxYĀYĉXĠXĪYijXXYU&.&.&P.&s .6&|r.&.&Ԛ.&s4F.&6&&GS&G_[&GP]uMYXX"V'V .X:XHXPXXV_XnXvYĄYēX̘V IgUQ&G &OFSP &G &W £&G &O  ]ݜ(YY%V +Y/Y3YHY[Yˠg UQ * \*****************************************************************************/ $SUBTITLE('Data Declaration Section') /*************************************************************** * * * Literal Data Declarations Section * * * ***************************************************************/ /***** Generic litedual_port_ram$desc, REC, @sq$board_irv$br, @sq$board_irv$desc, REC, @sq$firmware_vrfy$br, @sq$firmware_vrfy$desc, REC, @sq$pit_init$br, @sq$pit_init$desc, REC, @sq$usart_init$br, @sq$usart_init$desc, REC, @sq$pic_init$br, @sq$pic_init$desc, REC, @sq$ppi_a$br, @sq$ppi_a$desc, REC, @sq$urtirv$br, @sq$ur; DECLARE IGN LITERALLY '1', REC LITERALLY '0'; /*************************************************************** * * * External Data Declarations Section * * * ***************************************************************/ DECLARE error boolean EXTERNAL; $EJECT /******** * ***************************************************************/ DECLARE user$signon (*)BYTE PUBLIC DATA( 'System Diagnostic Test',' - 544, V3.0',CR,LF, 'Copyright 1983 INTEL Corporation',CR,LF,NULL); DECLARE sq$mb_ram$desc (*)BYTE DATA( 'MULTIBUS RAM Test',null), sq$jump_out$desc (*)BYTE DATA( 'Firmware Jumpout Command Test',null), sq$dual_port_ram$desc (*)BYTE DATA( 'Dual Port RAef$block (num$ts)STRUCTURE ( flag BYTE, /* RECoginze / IGNore test */ addr POINTER,/* Address of the test */ name$ptr POINTER)/* Address of test description */ PUBLIC DATA( REC, @sq$mb_ram$br, @sq$mb_ram$desc, REC, @sq$jump_out$br, @sq$jump_out$desc, REC, @sq$dual_port_ram$br, @sq$rals *****/ DECLARE boolean LITERALLY 'BYTE', cr LITERALLY '0Dh', lf LITERALLY '0Ah', null LITERALLY '0', true LITERALLY '0FFH', false LITERALLY '0', pass LITERALLY '0FFH', fail LITERALLY '0', /***** GPCP oriented literals *****/ /***** SDTMON oriented literals *****/ hexform LITERALLY '0C3h'tirv$desc, REC, @sq$bdrtv$br, @sq$bdrtv$desc, IGN, @sq$uct$br, @sq$uct$desc, IGN, @sq$ucr$br, @sq$ucr$desc, IGN, @sq$bsutil$br, @sq$bsutil$desc); $EJECT /*************************************************************** * * * Sign-on Message and Subtest Titles * * ******************************************************* * * * SDTxxx Test Definition Configuration Section * * * ***************************************************************/ DECLARE num$ts LITERALLY '14', /* Total number of optional */ /* and mandatory tests */ test$d M Test',null), sq$board_irv$desc (*)BYTE DATA( 'iSBC 544 Board Interrupt Test',null), sq$firmware_vrfy$desc (*)BYTE DATA( 'Firmware Verification',null), sq$pit_init$desc (*)BYTE DATA( 'PIT Initialization',null), sq$usart_init$desc (*)BYTE DATA( 'USART Initialization',null), sq$pic_init$desc (*)BYTE DATA( 'PIC Initialization',null), sq$ppi_a$desc (*)BYTE DATA( 'PPI Port A Initialization',nu */ board_1_send_intr LITERALLY '4', /* Board 1: send interrupt */ /* level as referred to by the */ /* PIC on the processer board. */ /* (a value > 7 means that the */ /* interrupt is not connected). */  * * Board-Specific Configuration Information * * * ***************************************************************/ DECLARE scratch LITERALLY '6000h', /* Size of user's scratch area. */ first_time LITERALLY 'TRUE', /* Do NOT ask reset questions */ /* on bootup. */ ERALLY '9600', /* Baud rate for port 2. */ b1_baud_rate_p3 LITERALLY '9600', /* Baud rate for port 3. */ b1_loop_back_p0 LITERALLY 'FALSE', /* No loop back connector */ /* installed on port 0. */ b1_loop_back_p1 LITERALLY 'FALSE', /* No loop back connector */ /* installed on port 1. */ b1_loop_back_p2 LITERALLY 'FALSE', /* No rds LITERALLY '1', /* Number of iSBC 544 boards in */ /* the system. */ board_1_offset LITERALLY '00000H', /* Board 1: offset portion of */ /* the base address. */ board_1_segment LITERALLY '0E000H', /* Board 1: segment portion of */ /* the base address. ll), sq$urtirv$desc (*)BYTE DATA( 'USART Interrupt Verification',null), sq$bdrtv$desc (*)BYTE DATA( 'Baud Rate Verification',null), sq$uct$desc (*)BYTE DATA( 'Character Transmit Test',null), sq$ucr$desc (*)BYTE DATA( 'Character Receiver Test',null), sq$bsutil$desc (*)BYTE DATA( 'Board Select Utility',null); $EJECT /*************************************************************** *  b1_inhibit_port_0 LITERALLY 'FALSE', /* Port 0 not inhibited. */ b1_inhibit_port_1 LITERALLY 'FALSE', /* Port 1 not inhibited. */ b1_inhibit_port_2 LITERALLY 'FALSE', /* Port 2 not inhibited. */ b1_inhibit_port_3 LITERALLY 'FALSE', /* Port 3 not inhibited. */ b1_baud_rate_p0 LITERALLY '9600', /* Baud rate for port 0. */ b1_baud_rate_p1 LITERALLY '9600', /* Baud rate for port 1. */ b1_baud_rate_p2 LIT /* ALL of the board data literals must be left here even if they are not */ /* used, since they are required in a data statement down furthur in this */ /* module. */ /* */ /* ****** Board 1 information. ****** */ /* */ number_of_boa loop back connector */ /* installed on port 2. */ b1_loop_back_p3 LITERALLY 'FALSE', /* No loop back connector */ /* installed on port 3. */ /* */ /* ****** Board 2 information. ****** */ /* oop back connector */ /* installed on port 2. */ b2_loop_back_p3 LITERALLY 'FALSE', /* No loop back connector */ /* installed on port 3. */ /* */ /* ****** Board 3 information. ****** */ /*  */ board_2_send_intr LITERALLY '4', /* Board 2: send interrupt */ /* level as referred to by the */ /* PIC on the processer board. */ /* (a value > 7 means that the */ /* interrupt is not connected). */  /* the base address. */ board_3_send_intr LITERALLY '4', /* Board 3: send interrupt */ /* level as referred to by the */ /* PIC on the processer board. */ /* (a value > 7 means that the */ /* interrupt is not connected). */ RALLY '9600', /* Baud rate for port 2. */ b2_baud_rate_p3 LITERALLY '9600', /* Baud rate for port 3. */ b2_loop_back_p0 LITERALLY 'FALSE', /* No loop back connector */ /* installed on port 0. */ b2_loop_back_p1 LITERALLY 'FALSE', /* No loop back connector */ /* installed on port 1. */ b2_loop_back_p2 LITERALLY 'FALSE', /* No l */ /* note that the information about board 2 will */ /* only be used if number_of_boards is 2 or greater */ board_2_offset LITERALLY '00000H', /* Board 2: offset portion of */ /* the base address. */ board_2_segment LITERALLY '0E400H', /* Board 2: segment portion of */ /* the base address.  */ /* note that the information about board 3 will */ /* only be used if number_of_boards is 3 or greater */ board_3_offset LITERALLY '00000H', /* Board 3: offset portion of */ /* the base address. */ board_3_segment LITERALLY '0E800H', /* Board 3: segment portion of */ b2_inhibit_port_0 LITERALLY 'FALSE', /* Port 0 not inhibited. */ b2_inhibit_port_1 LITERALLY 'FALSE', /* Port 1 not inhibited. */ b2_inhibit_port_2 LITERALLY 'FALSE', /* Port 2 not inhibited. */ b2_inhibit_port_3 LITERALLY 'FALSE', /* Port 3 not inhibited. */ b2_baud_rate_p0 LITERALLY '9600', /* Baud rate for port 0. */ b2_baud_rate_p1 LITERALLY '9600', /* Baud rate for port 1. */ b2_baud_rate_p2 LITE! b3_inhibit_port_0 LITERALLY 'FALSE', /* Port 0 not inhibited. */ b3_inhibit_port_1 LITERALLY 'FALSE', /* Port 1 not inhibited. */ b3_inhibit_port_2 LITERALLY 'FALSE', /* Port 2 not inhibited. */ b3_inhibit_port_3 LITERALLY 'FALSE', /* Port 3 not inhibited. */ b3_baud_rate_p0 LITERALLY '9600', /* Baud rate for port 0. */ b3_baud_rate_p1 LITERALLY '9600', /* Baud rate for porinterrupt is not connected). */ b4_inhibit_port_0 LITERALLY 'FALSE', /* Port 0 not inhibited. */ b4_inhibit_port_1 LITERALLY 'FALSE', /* Port 1 not inhibited. */ b4_inhibit_port_2 LITERALLY 'FALSE', /* Port 2 not inhibited. */ b4_inhibit_port_3 LITERALLY 'FALSE', /* Port 3 not inhibited. */ b4_baud_rate_p0 LITERALLY '9600', /* Baud rate for port 0. */ b4_baud_rate_p1 LITERoop_back_p2 LITERALLY 'FALSE', /* No loop back connector */ /* installed on port 2. */ b3_loop_back_p3 LITERALLY 'FALSE', /* No loop back connector */ /* installed on port 3. */ /* */ /* ****** Board 4 information. ****** lled on port 1. */ b4_loop_back_p2 LITERALLY 'FALSE', /* No loop back connector */ /* installed on port 2. */ b4_loop_back_p3 LITERALLY 'FALSE', /* No loop back connector */ /* installed on port 3. */ board_in_test LITERALLY '1'; /* Number of the board to be */ /* tested. This number refersion of */ /* the base address. */ board_4_send_intr LITERALLY '4', /* Board 4: send interrupt */ /* level as referred to by the */ /* PIC on the processer board. */ /* (a value > 7 means that the */ /* t 1. */ b3_baud_rate_p2 LITERALLY '9600', /* Baud rate for port 2. */ b3_baud_rate_p3 LITERALLY '9600', /* Baud rate for port 3. */ b3_loop_back_p0 LITERALLY 'FALSE', /* No loop back connector */ /* installed on port 0. */ b3_loop_back_p1 LITERALLY 'FALSE', /* No loop back connector */ /* installed on port 1. */ b3_lALLY '9600', /* Baud rate for port 1. */ b4_baud_rate_p2 LITERALLY '9600', /* Baud rate for port 2. */ b4_baud_rate_p3 LITERALLY '9600', /* Baud rate for port 3. */ b4_loop_back_p0 LITERALLY 'FALSE', /* No loop back connector */ /* installed on port 0. */ b4_loop_back_p1 LITERALLY 'FALSE', /* No loop back connector */ /* insta */ /* */ /* note that the information about board 4 will */ /* only be used if number_of_boards is 4 or greater */ board_4_offset LITERALLY '00000H', /* Board 4: offset portion of */ /* the base address. */ board_4_segment LITERALLY '0EC00H', /* Board 4: segment port! */ /* to the boards specified in */ /* the following literals. */ $EJECT /*************************************************************** * * * Test-Specific Configuration Information * * * ********************************************************WARE VERIFICATION */ PROCEDURE EXTERNAL; END sq$firmware_vrfy; sq$firmware_vrfy$br: PROCEDURE boolean PUBLIC; CALL Initialize$GPCP$flags; CALL sq$firmware_vrfy; RETURN NOT error; END sq$firmware_vrfy$br; sq$pit_init: /* PIT INITIALIZATION */ PROCEDURE EXTERNAL; END sq$pit_init; sq$pit_init$br: PROCEDURE boolean PUBLIC; CALL Initialize$GPCP$flags; CALL sq$pit_init; RETURN NOT error; END sq$pit_init$b */ END Initialize$GPCP$flags; $EJECT /*************************************************************** * * * Mandatory Tests * * * ***************************************************************/ sq$mb_ram: /* MULTIBUS RAM TEST */ PROCEDURE EXTERNAL; END sq$mb_ram; sq$mb_ram$b RETURN NOT error; END sq$pic_init$br; sq$ppi_a: /* PPI PORT A INITIALIZATION */ PROCEDURE EXTERNAL; END sq$ppi_a; sq$ppi_a$br: PROCEDURE boolean PUBLIC; CALL Initialize$GPCP$flags; CALL sq$ppi_a; RETURN NOT error; END sq$ppi_a$br; sq$urtirv: /* USART INTERRUPT VERIFICATION */ PROCEDURE EXTERNAL; END sq$urtirv; sq$urtirv$br: PROCEDURE boolean PUBLIC; CALL Initialize$GPCP$flags; C sq$dual_port_ram; sq$dual_port_ram$br: PROCEDURE boolean PUBLIC; CALL Initialize$GPCP$flags; CALL sq$dual_port_ram; RETURN NOT error; END sq$dual_port_ram$br; sq$board_irv: /* iSBC 544 BOARD INTERRUPT VERIFICATION */ PROCEDURE EXTERNAL; END sq$board_irv; sq$board_irv$br: PROCEDURE boolean PUBLIC; CALL Initialize$GPCP$flags; CALL sq$board_irv; RETURN NOT error; END sq$board_irv$br; sq$firmware_vrfy: /* iRMX86/XENIX FIRM*******/ $EJECT /*************************************************************** * * * Mandatory Subroutines * * * ***************************************************************/ Initialize$GPCP$flags: /* Initialize GPCP variables */ PROCEDURE EXTERNAL; /* not normally used in SDTMONr; sq$usart_init: /* USART INITIALIZATION */ PROCEDURE EXTERNAL; END sq$usart_init; sq$usart_init$br: PROCEDURE boolean PUBLIC; CALL Initialize$GPCP$flags; CALL sq$usart_init; RETURN NOT error; END sq$usart_init$br; sq$pic_init: /* PIC INITIALIZATION */ PROCEDURE EXTERNAL; END sq$pic_init; sq$pic_init$br: PROCEDURE boolean PUBLIC; CALL Initialize$GPCP$flags; CALL sq$pic_init; r: PROCEDURE boolean PUBLIC; CALL Initialize$GPCP$flags; CALL sq$mb_ram; RETURN NOT error; END sq$mb_ram$br; sq$jump_out: /* iRMX86/XENIX FIRMWARE JUMPOUT COMMAND TEST */ PROCEDURE EXTERNAL; END sq$jump_out; sq$jump_out$br: PROCEDURE boolean PUBLIC; CALL Initialize$GPCP$flags; CALL sq$jump_out; RETURN NOT error; END sq$jump_out$br; sq$dual_port_ram: /* DUAL PORT RAM TEST */ PROCEDURE EXTERNAL; END"ALL sq$urtirv; RETURN NOT error; END sq$urtirv$br; sq$bdrtv: /* BAUD RATE VERIFICATION */ PROCEDURE EXTERNAL; END sq$bdrtv; sq$bdrtv$br: PROCEDURE boolean PUBLIC; CALL Initialize$GPCP$flags; CALL sq$bdrtv; RETURN NOT error; END sq$bdrtv$br; $EJECT /*************************************************************** * * * Optional Tests  *!*!* ALLOW FOR FUTURE CHANGES. *!*!* */ DECLARE /* */ /* ****** Board 1 information. ****** */ /* */ board_1_ram_size LITERALLY '04000H', /* Board 1: size of the dual */ /* port RAM. */ boar sq$ucr; sq$ucr$br: PROCEDURE boolean PUBLIC; CALL Initialize$GPCP$flags; CALL sq$ucr; RETURN NOT error; END sq$ucr$br; sq$bsutil: /* Board Select Utility */ PROCEDURE EXTERNAL; END sq$bsutil; sq$bsutil$br: PROCEDURE boolean PUBLIC; CALL Initialize$GPCP$flags; CALL sq$bsutil; RETURN NOT error; END sq$bsutil$br; $EJECT /*********************************************************** *  /* connected to timer 0 */ b1_USART_timer_p1 LITERALLY '1', /* Usart 1 transmit and receive */ /* connected to timer 1 */ b1_USART_timer_p2 LITERALLY '2', /* Usart 2 transmit and receive */ /* connected to timer 2 */ b1_USART_timer_p3 LITERALLY '3', /* Usart 3 transmit and receive */ /* co exec$cnt WORD) PUBLIC, user$number$of$tests WORD PUBLIC DATA(num$ts); DECLARE user$scratch (scratch) BYTE PUBLIC, /* User scratch area */ user$scratch$size WORD PUBLIC DATA(scratch); /* *!*!* THE FOLLOWING LITERALS ARE PUT HERE *!*!* */ /* *!*!* SINCE CURRENTLY THEY ARE IN NO WAY *!*!* */ /* *!*!* TO BE CHANGED. THEY ARE PUT IN TO *!*!* */ /* * * * ***************************************************************/ sq$uct: /* CHARACTER TRANSMIT TEST */ PROCEDURE EXTERNAL; END sq$uct; sq$uct$br: PROCEDURE boolean PUBLIC; CALL Initialize$GPCP$flags; CALL sq$uct; RETURN NOT error; END sq$uct$br; sq$ucr: /* CHARACTER RECEIVER TEST */ PROCEDURE EXTERNAL; ENDd_1_rec_intr LITERALLY '0', /* Board 1: receive interrupt */ /* level as referred to by the */ /* PIC on the processer board. */ /* (a value > 7 means that the */ /* interrupt is not connected). */ b1_USART_timer_p0 LITERALLY '0', /* Usart 0 transmit and receive */  * * Non-Configurable Data Area * * * ***********************************************************/ DECLARE user$tdt (num$ts)STRUCTURE ( flag BYTE, overlay BYTE, addr POINTER, name$ptr POINTER, err$cnt WORD, "nnected to timer 3 */ b1_cascaded LITERALLY 'TRUE', /* Timers 4 and 5 cascaded */ /* */ /* ****** Board 2 information. ****** */ /* */ board_2_ram_size LITERALLY '04000H', /* Board 2: size of the dual */ /* pr_p0 LITERALLY '0', /* Usart 0 transmit and receive */ /* connected to timer 0 */ b3_USART_timer_p1 LITERALLY '1', /* Usart 1 transmit and receive */ /* connected to timer 1 */ b3_USART_timer_p2 LITERALLY '2', /* Usart 2 transmit and receive */ /* connected to timer 2 */ b3_USART_timer_p3 LITERALLY '3', nsmit and receive */ /* connected to timer 0 */ b2_USART_timer_p1 LITERALLY '1', /* Usart 1 transmit and receive */ /* connected to timer 1 */ b2_USART_timer_p2 LITERALLY '2', /* Usart 2 transmit and receive */ /* connected to timer 2 */ b2_USART_timer_p3 LITERALLY '3', /* Usart 3 transmit and receive */ /* Board 4: size of the dual */ /* port RAM. */ board_4_rec_intr LITERALLY '0', /* Board 4: receive interrupt */ /* level as referred to by the */ /* PIC on the processer board. */ /* (a value > 7 means that the */ /* interrupt is not connect /* port RAM. */ board_3_rec_intr LITERALLY '0', /* Board 3: receive interrupt */ /* level as referred to by the */ /* PIC on the processer board. */ /* (a value > 7 means that the */ /* interrupt is not connected). */ b3_USART_timeort RAM. */ board_2_rec_intr LITERALLY '0', /* Board 2: receive interrupt */ /* level as referred to by the */ /* PIC on the processer board. */ /* (a value > 7 means that the */ /* interrupt is not connected). */ b2_USART_timer_p0 LITERALLY '0', /* Usart 0 tra /* Usart 3 transmit and receive */ /* connected to timer 3 */ b3_cascaded LITERALLY 'TRUE', /* Timers 4 and 5 cascaded */ /* */ /* ****** Board 4 information. ****** */ /* */ board_4_ram_size LITERALLY '04000H',  /* connected to timer 3 */ b2_cascaded LITERALLY 'TRUE', /* Timers 4 and 5 cascaded */ /* */ /* ****** Board 3 information. ****** */ /* */ board_3_ram_size LITERALLY '04000H', /* Board 3: size of the dual */ #ed). */ b4_USART_timer_p0 LITERALLY '0', /* Usart 0 transmit and receive */ /* connected to timer 0 */ b4_USART_timer_p1 LITERALLY '1', /* Usart 1 transmit and receive */ /* connected to timer 1 */ b4_USART_timer_p2 LITERALLY '2', /* Usart 2 transmit and receive */ /* connected to timer 2 */ b4_USART_ti DATA( board_1_ram_size, board_1_offset , board_1_segment, /* Board 1: base addr,int level */ board_1_send_intr, board_1_rec_intr, b1_inhibit_port_0, b1_inhibit_port_1, b1_inhibit_port_2, b1_inhibit_port_3, b1_baud_rate_p0, b1_baud_rate_p1, b1_baud_rate_p2, b1_baud_rate_p3, b1_loop_back_p0, b1_loop_back_p1, b1_loop_back_p2, b1_loop_back_p3, b1_USART_timer /* 2 = 2.46 MHz. */ system_timer LITERALLY '0', /* Onboard timer to be used for */ /* the fail/safe timer. */ system_timer_intr LITERALLY '0', /* Interrupt connected to timer */ /* specified in cpu_timer. */ system_base_port LITERALLY '0C0H'; /* System processer b b2_loop_back_p0, b2_loop_back_p1, b2_loop_back_p2, b2_loop_back_p3, b2_USART_timer_p0, b2_USART_timer_p1, b2_USART_timer_p2, b2_USART_timer_p3, b2_cascaded, board_3_ram_size, board_3_offset , board_3_segment, /* Board 3: base addr,int level */ board_3_send_intr, board_3_rec_intr, b3_inhibit_port_0, b3_inhibit_port_1, b3_inhibit_ /* Data about iSBC 544 boards */ pq$board$init (4) STRUCTURE ( ram_size WORD, base_offset WORD, base_segment WORD, send_int_level BYTE, receive_int_level BYTE, inhibit_port (4) BOOLEAN, baud_rate (4) WORD, loop_back (4) BOOLEAN, u_t (4) BYTE, cascaded BOOLEAN ) PUBLIC mer_p3 LITERALLY '3', /* Usart 3 transmit and receive */ /* connected to timer 3 */ b4_cascaded LITERALLY 'TRUE', /* Timers 4 and 5 cascaded */ system_clof LITERALLY '1', /* Onboard timer frequency: */ /* 0 = 153.6 KHz. */ /* 1 = 1.23 MHz. */ _p0, b1_USART_timer_p1, b1_USART_timer_p2, b1_USART_timer_p3, b1_cascaded, board_2_ram_size, board_2_offset , board_2_segment, /* Board 2: base addr,int level */ board_2_send_intr, board_2_rec_intr, b2_inhibit_port_0, b2_inhibit_port_1, b2_inhibit_port_2, b2_inhibit_port_3, b2_baud_rate_p0, b2_baud_rate_p1, b2_baud_rate_p2, b2_baud_rate_p3, oard */ /* base port. */ /* And finally the configuration variables */ DECLARE pq$first_time$init BYTE PUBLIC DATA( first_time ), /* Number of iSBC 544 boards in */ /* the system. */ pq$number_of_boards$init BYTE PUBLIC DATA( number_of_boards ), #port_2, b3_inhibit_port_3, b3_baud_rate_p0, b3_baud_rate_p1, b3_baud_rate_p2, b3_baud_rate_p3, b3_loop_back_p0, b3_loop_back_p1, b3_loop_back_p2, b3_loop_back_p3, b3_USART_timer_p0, b3_USART_timer_p1, b3_USART_timer_p2, b3_USART_timer_p3, b3_cascaded, board_4_ram_size, board_4_offset , board_4_segment, /* Board 4: base addr,int level */ boar /* Number of the board that is */ /* currently being tested. */ pq$board_in_test$init BYTE PUBLIC DATA( board_in_test ), /* system clock frequency for */ /* fail/safe timer. */ pq$system_clof$init BYTE PUBLIC DATA( system_clof ), /* System timer to be used /* base port. */ pq$system_base_port$init WORD PUBLIC DATA( system_base_port ); /*********************************************************** * End of Configuration Module * ***********************************************************/ END Configuration; d_4_send_intr, board_4_rec_intr, b4_inhibit_port_0, b4_inhibit_port_1, b4_inhibit_port_2, b4_inhibit_port_3, b4_baud_rate_p0, b4_baud_rate_p1, b4_baud_rate_p2, b4_baud_rate_p3, b4_loop_back_p0, b4_loop_back_p1, b4_loop_back_p2, b4_loop_back_p3, b4_USART_timer_p0, b4_USART_timer_p1, b4_USART_timer_p2, b4_USART_timer_p3, b4_cascaded),  for */ /* fail/safe timer. */ pq$system_timer$init BYTE PUBLIC DATA( system_timer ), /* Interrupt connected to timer */ /* used for fail/safe timer. */ pq$system_timer_intr$init BYTE PUBLIC DATA( system_timer_intr ), /* System processer board */ $ _ tr  _ tr"\ tr$b tr& _ tr(DONEERROR  DIAGNOSTICS TESTERRORACTION ABORT  MEMLIMVALID LOWLIMITHILIMITLOWLIMITSEGMENTHILIMITSEGMENTPAGEFLAGPAGE LINEBUFFER>INITIALIZEGPCPFLAGS  INPUT_LINE4PRINT_BIN_BYTEJ PRINT_BIN_NIBgPRINT_BIN_WORDPRINT_DEC_BYTE PRINT_DEC_NIBPRINT_DEC_WORDPRINT_HEX_BYTE! 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