MQL=JMS I Z 71
DVI=JMS I Z 72
MUY=JMS I Z 74
NMI=JMS I Z 76
SHL=JMS I Z 77
ASR=JMS I Z 100
LSR=JMS I Z 101
SCA=JMS I Z 102
MQA=JMS I Z 103
CAM=JMS I Z 104
FIXTAB
*67
SUDOMQ,	0
SUDOSC,	0
	PSDMQL
	PSDDVI
	MQLDVI
	PSDMUY
	MQLMUY
	PSDNMI
	PSDSHL
	PSDASR
	PSDLSR
	PSDSCA
	PSDMQA
	PSDCAM

*6700
PSDNMI,	0		/NMI
	DCA PSDSCA	/SAVE AC
	DCA SUDOSC	/CLEAR STEP COUNTER.
	TAD PSDSCA
	SZA
	JMP .+5
	TAD SUDOMQ
	SNA CLA
	JMP I PSDNMI	/0 AC AND MQ.
NMIBK2,	TAD PSDSCA
	RAL
	SZL
	JMP NMIOUT	/AC0=1
	SPA
	JMP NMIOUT+2	/AC0=0 AND AC1=1
	CLA		/AC0=AC1=0
NMIBCK,	TAD SUDOMQ
	CLL RAL
	DCA SUDOMQ
	TAD PSDSCA
	RAL
	DCA PSDSCA
	ISZ SUDOSC
	JMP NMIBK2
NMIOUT,	SPA
	JMP .+3		/AC0=AC1=1
	RAR		/AC0 DOES NOT EQUAL AC1
	JMP I PSDNMI	/EXIT
	RAR		/TEST IF NUMBER 6000 0000
	TAD .+11
	SZA CLA
	JMP NMIBCK	/NOT 6000
	TAD SUDOMQ
	SZA
	JMP NMIBCK+1	/NOT 0000
	CML		/RESTORE LINK
	TAD PSDSCA	/RESTORE 6000
	JMP I PSDNMI	/EXIT
	-6000
PSDSCA,	0		/SCA
	DCA PSDMQA	/INCLUSIVE OR
	TAD PSDMQA	/STEP COUNTER
	CMA		/AND AC
	AND SUDOSC
	TAD PSDMQA
	JMP I PSDSCA
PSDMQA,	0		/MQA
	DCA PSDSCA	/INCLUSIVE OR
	TAD PSDSCA	/MQ
	CMA		/AND AC
	AND SUDOMQ
	TAD PSDSCA
	JMP I PSDMQA

*PSDNMI+100
PSDMQL,	0		/MQL
	DCA Z SUDOMQ
	JMP I PSDMQL
PSDCAM,	0		/CAM (CLA!MQL)
	CLA
	DCA Z SUDOMQ
	JMP I PSDCAM
MQLMUY,	0		/MQL!MUY
	DCA Z SUDOMQ
	TAD MQLMUY	/SET UP
	DCA PSDMUY	/FOR MUY SUBROUTINE
	JMP PSDMUY+1
MQLDVI,	0		/MQL!DVI
	DCA Z SUDOMQ
	TAD MQLDVI	/SET UP
	DCA PSDDVI	/FOR DVI SUBROUTINE
	JMP PSDDVI+1
	37
PSDSHL,	0		/SHL
	DCA PSDCAM	/SAVE AC
	TAD I PSDSHL	/SHIFT COUNT
	ISZ PSDSHL	/EXIT POINT
	AND PSDSHL-1	/5 BIT COUNTER
	CMA
	DCA SUDOSC
	TAD SUDOMQ	/SHIFT COMBINED
	CLL RAL		/AC AND MQ
	DCA SUDOMQ	/1 BIT TO THE
	TAD PSDCAM	/LEFT
	RAL
	DCA PSDCAM
	ISZ SUDOSC
	JMP .-7		/MORE SHIFTING
	TAD PSDCAM
	JMP I PSDSHL	/EXIT
PSDLSR,	0		/LSR
	DCA PSDCAM	/SAVE AC
	TAD PSDLSR	/USE ASR
	DCA PSDASR	/ROUTINE
	CLL
	JMP PSDASR+5

PSDASR,	0		/ASR
	CLL		/SET LINK=SIGN
	SPA
	CML
	DCA PSDCAM	/SAVE AC
	TAD I PSDASR	/SHIFT COUNT
	ISZ PSDASR	/EXIT POINT
	AND PSDSHL-1	/5 BIT COUNTER
	CMA
	DCA SUDOSC
	TAD PSDCAM	/RESTORE AC
	JMP .+4
	TAD PSDCAM
	SPA
	CML
	RAR
	DCA PSDCAM
	TAD SUDOMQ
	RAR
	DCA SUDOMQ
	CLL
	ISZ SUDOSC
	JMP .-12		/MORE SHIFTING
	TAD PSDCAM
	SPA
	CML		/LINK=AC0
	JMP I PSDASR
	7763
PSDDVI,	0		/DVI
	DCA PSDCAM	/SAVE HIGH ORDER DIVIDEND
	TAD I PSDDVI	/DIVISOR
	ISZ PSDDVI	/EXIT POINT
	CLL CMA IAC
	DCA MQLMUY	/2'S COMPLEMENT OF DIVISOR
	TAD PSDCAM	/HIGH ORDER DIVIDEND
	TAD MQLMUY
	SZL CLA
	JMP I PSDDVI	/DIVIDE OVERFLOW
	TAD PSDDVI-1	/7763
	DCA PSDLSR	/COUNTER
	JMP .+11
	TAD PSDCAM
	RAL
	DCA PSDCAM
	TAD PSDCAM
	TAD MQLMUY
	SZL
	DCA PSDCAM
	CLA
	TAD SUDOMQ
	RAL
	DCA SUDOMQ
	ISZ PSDLSR
	JMP .-14
	TAD PSDCAM	/COUNT EXHAUSTED
	JMP I PSDDVI	/EXIT

PSDMUY,	0		/MUY
	CLA CLL
	DCA MQLDVI	/CLEAR PRODUCT (MOST SIG.) REGISTER
	TAD PSDDVI-1
	DCA PSDLSR	/LOOP COUNTER
	TAD I PSDMUY
	DCA PSDMQL	/OPERAND
	ISZ PSDMUY	/EXIT POINT
	JMP .+10
	TAD MQLDVI
	SNL
	JMP .+3
	CLL
	TAD PSDMQL
	RAR
	DCA MQLDVI
	TAD SUDOMQ
	RAR
	DCA SUDOMQ	/LOW ORDER PRODUCT
	ISZ PSDLSR
	JMP .-13
	TAD MQLDVI	/HIGH ORDER PRODUCT
	JMP I PSDMUY	/EXIT
PAUSE