The ATARI (R) 800™ and ATARI 400™ Personal Computer Systems contain a 6502 microprocessor, 4 I/O chips, operating system ROM, expandable RAM, and several MSI chips for address decoding and data bus buffering.
This manual is primarily intended to describe the 4 I/O chips in sufficient detail to allow experienced programmers to create assembly language programs, such as video games. All four Input / Output chips are controlled by the microprocessor by writing directly into their registers which are decoded to exist in microprocessor memory space just as RAM does. These I/O chips can also be interrogated by the microprocessor by reading similar registers.
Many registers are write only and cannot be read after they are written. In some cases, reading from the same address gives the value contained in a separate read only register. Some write only registers are strobes. No data bits are needed in this case since the presence of the address on the bus is what triggers the requested action. The usual convention is to use the STA (Store Accumulator) instruction for such registers. For example, STA WSYNC performs the wait for Sync function. STX (Store X) or STY (Store Y) would work just as well. In BASIC, a POKE could be used (the data could be anything). Reading a register is accomplished by using any of the load instructions (LDA, LDX etc.). In BASIC a PEEK would be used. When the hardware register names are defined in an equate list, the programmer can refer to the registers by name rather than using the addresses directly.
It is really not necessary for the programmer to know which I/O functions are performed by which of the 4 chips, however it does help in learning these functions.
This manual should be used in conjunction with the Operating System (OS) Manual, a 6502 programming manual, and the ATARI 400/800 Basic Reference Manual.
| CHIP NAME | FUNCTION |
| ANTIC | DMA
(Direct Memory Access) control NMI (Non-Maskable Interrupt) control Vertical and Horizontal fine scrolling Light pen position registers Vertical line counter WSYNC(wait for horizontal sync) |
| CTIA | Priority
control (display of overlapping objects) Colour-Luminance control (colours and brightness assigned to all objects including DMA objects from ANTIC) PLAYER-MISSILE objects (4 players and 4 missiles) Graphics registers Size control Horizontal position control Collision detection between all objects Switches and triggers (miscellaneous I/O functions) |
| POKEY | Keyboard
scan and control Serial communications port (bidirectional) Pot scan (digitizes position of 8 independent pots) Audio generation (4 channels) Timers IRQ (maskable interrupt) control from peripherals Random number generator |
| PIA | Controller
(Joystick) Jacks read or write Peripheral control and interrupt lines IRQ (maskable) interrupt control from peripherals |
Section II describes the hardware in some detail, including the various graphics modes.
Section III lists the hardware registers one at a time, describing what each bit is used for. It is organized by functional groups (interrupts, graphics, audio, etc.).
Section IV contains a sample display program.
Section V contains various figures and block diagrams of the system.
Sections VI and VII list the hardware registers in address order and alphabetical order.
Section VIII includes hex and decimal addresses, the OS shadow registers and the page numbers where more information can be found.