Forward Technology CPU Boot Routines selected by jumpering pin pairs (always across the P2 connector) on the parallel port of the CPU board 10th pair jumpered = verbose boot 2nd pair: fujitsu block 0 (auto boot) 1st & 2nd: fujitsu last block (optional boot) 3rd: rimfire boot of 1/4" tape 4th: tapemaster (cipher) boot of 1/2" tape 5th: boot from serial port b 6th: Atasi/DSD st506 boot Forward Technology System Notes multibus memory at 0x20000 (multibus mem space) ft1024 framebuffer at 0x0 (multibus mem space) smd (interphase) int 5, 512 byte sectors, I/O addr at F0 rimfire int 1, attention port 0xffda, 16 bit data bus inital iopb at 0x20006 (20 bit addr) dma address can have 4 high bits of 24 set ina a register, but all IOPSs must be in the first 1mb! all selectable buss, i/o addr, data = 16 bits octal serial board cts=int, bit 7 of 12 post dip sw open, all others closed, r&t interrupts enabled, extended I/O enabled, aack enabled, xack=3, aack=0, int=2 and cut trace from ic 29 pin 5 to p1(31), connect ic 29 pin 5 to p1(13) Serial port Defaults are 9600 baud for both serial channels. Split 50 pin header ribbon cable in half, low half is port A which is DCE (RX 2, TX 3) Port B is DTE (TX 2 RX 3).